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Publications of Author

1. René Natowicz, Marcelo Alves de Barros, Mohamed Akil, Fabrizio Bosio
   Real Time Segmentation of Image Sequences by Self-Organizing Feature Map: Method and Reconfigurable Architecture. [Citation Graph (0, 0)][DBLP]
   Applications in Parallel and Distributed Computing, 1994, pp:267-276 [Conf]
   
2. Linda Kaouane, Mohamed Akil, Thierry Grandpierre, Yves Sorel
   A Methodology to Implement Real-Time Applications on Reconfigurable Circuits. [Citation Graph (0, 0)][DBLP]
   Engineering of Reconfigurable Systems and Algorithms, 2003, pp:188-200 [Conf]
   
3. Mohamed Akil, Marcelo Alves de Barros
   Implementation and Performance Evaluation of an Image Pre-Processing Chain on FPGA. [Citation Graph (0, 0)][DBLP]
   FPL, 1994, pp:332-334 [Conf]
   
4. Linda Kaouane, Mohamed Akil, Yves Sorel, Thierry Grandpierre
   From Algorithm Graph Specification to Automatic Synthesis of FPGA Circuit: A Seamless Flow of Graphs Transformations. [Citation Graph (0, 0)][DBLP]
   FPL, 2003, pp:934-943 [Conf]
   
5. Pierre Niang, Thierry Grandpierre, Mohamed Akil, Yves Sorel
   AAA and SynDEx-Ic: A Methodology and a Software Framework for the Implementation of Real-Time Applications onto Reconfigurable Circuits. [Citation Graph (0, 0)][DBLP]
   FPL, 2004, pp:1119-1123 [Conf]
   
6. Linda Kaouane, Mohamed Akil, Thierry Grandpierre, Yves Sorel
   A Methodology to Implement Real-Time Applications onto Reconfigurable Circuits. [Citation Graph (0, 0)][DBLP]
   The Journal of Supercomputing, 2004, v:30, n:3, pp:283-301 [Journal]
   
7. Pierre Niang, Thierry Grandpierre, Mohamed Akil
   Implementing Real-Time Algorithms by using the AAA Prototyping Methodology. [Citation Graph (0, 0)][DBLP]
   IESS, 2007, pp:27-36 [Conf]
   
8. 
   Parallel Algorithm for Concurrent Computation of Connected Component Tree. [Citation Graph (, )][DBLP]
   
   
9. 
   Efficient Poisson denoising for photography. [Citation Graph (, )][DBLP]
   
   
10. 
    VLSI Optimal Edge Detection Chip: Canny-Deriche Filter. [Citation Graph (, )][DBLP]
    
    
11. 
    A 'Hyper-Pyramid' Architecture for Massively Parallel Image Processing. [Citation Graph (, )][DBLP]