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S. C. Smith: [Publications] [Author Rank by year] [Co-authors] [Prefers] [Cites] [Cited by]

Publications of Author

  1. S. C. Smith
    Development of a large word-width high-speed asynchronous multiply and accumulate unit. [Citation Graph (0, 0)][DBLP]
    Integration, 2005, v:39, n:1, pp:12-28 [Journal]
  2. S. C. Smith
    Speedup of NULL convention digital circuits using NULL cycle reduction. [Citation Graph (0, 0)][DBLP]
    Journal of Systems Architecture, 2006, v:52, n:7, pp:411-422 [Journal]
  3. Venkat Satagopan, Bonita Bhaskaran, W. K. Al-Assadi, S. C. Smith, S. Kakarla
    DFT Techniques and Automation for Asynchronous NULL Conventional Logic Circuits. [Citation Graph (0, 0)][DBLP]
    IEEE Trans. VLSI Syst., 2007, v:15, n:10, pp:1155-1159 [Journal]

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