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Title:
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Raul Camposano: [Publications] [Author Rank by year] [Co-authors] [Prefers] [Cites] [Cited by]

Publications of Author

  1. Raul Camposano
    Concurrency in Functional Descriptions. [Citation Graph (0, 0)][DBLP]
    Selected Papers from the First and the Second European Workshop on Application and Theory of Petri Nets, 1981, pp:45-49 [Conf]
  2. Raul Camposano, Olivier Coudert, Patrick Groeneveld, Leon Stok, Ralph H. J. M. Otten
    Timing closure: the solution and its problems. [Citation Graph (0, 0)][DBLP]
    ASP-DAC, 2000, pp:359-364 [Conf]
  3. Raul Camposano, Mark Underseth, Faraydon Karim
    Industry best practices in embedded software. [Citation Graph (0, 0)][DBLP]
    CODES+ISSS, 2003, pp:72-73 [Conf]
  4. Jörg Wilberg, Raul Camposano, Wolfgang Rosenstiel
    Design flow for hardware/software cosynthesis of a video compression system. [Citation Graph (0, 0)][DBLP]
    CODES, 1994, pp:73-80 [Conf]
  5. Reinaldo A. Bergamaschi, Raul Camposano, Michael Payer
    Data-Path Synthesis Using Path Analysis. [Citation Graph (0, 0)][DBLP]
    DAC, 1991, pp:591-596 [Conf]
  6. Ansgar Bredenfeld, Raul Camposano
    Tool Integration and Construction Using Generated Graph-Based Design Representations. [Citation Graph (0, 0)][DBLP]
    DAC, 1995, pp:94-99 [Conf]
  7. Raul Camposano
    Behavioral Synthesis. [Citation Graph (0, 0)][DBLP]
    DAC, 1996, pp:33-34 [Conf]
  8. Raul Camposano, Jacob Greidinger, Patrick Groeneveld, Michael Jackson, Lawrence T. Pileggi, Louis Scheffer
    Design closure (panel session): hope or hype? [Citation Graph (0, 0)][DBLP]
    DAC, 2000, pp:176-177 [Conf]
  9. Raul Camposano, Kurt Keutzer, Jerry Fiddler, Alberto L. Sangiovanni-Vincentelli, Jim Lansford
    HW and SW in Embedded System Design: Loveboat, Shipwreck, or Ships Passing in the Night. [Citation Graph (0, 0)][DBLP]
    DAC, 1999, pp:76-77 [Conf]
  10. Raul Camposano
    Design Process Model in the Yorktown Silicon Compiler. [Citation Graph (0, 0)][DBLP]
    DAC, 1988, pp:489-494 [Conf]
  11. Nikil D. Dutt, David Agnew, Raul Camposano, Antun Domic, Manfred Wiesel, Hiroto Yasuura
    Design Reuse: Fact or Fiction? (Panel). [Citation Graph (0, 0)][DBLP]
    DAC, 1994, pp:562- [Conf]
  12. Michael C. McFarland, Alice C. Parker, Raul Camposano
    Tutorial on High-Level Synthesis. [Citation Graph (0, 0)][DBLP]
    DAC, 1988, pp:330-336 [Conf]
  13. Wolfgang Meyer, Raul Camposano
    Fast Hierarchical Multi-Level Fault Simulation of Sequential Circuits with Switch-Level Accuracy. [Citation Graph (0, 0)][DBLP]
    DAC, 1993, pp:515-519 [Conf]
  14. Jan M. Rabaey, Joachim Kunkel, Dennis Brophy, Raul Camposano, Davoud Samani, Larry Lerner, Rick Hetherington
    What's the next EDA driver? [Citation Graph (0, 0)][DBLP]
    DAC, 2002, pp:652- [Conf]
  15. Shishpal Rawat, Raul Camposano, A. Kahng, Joseph Sawicki, Mike Gianfagna, Naeem Zafar, A. Sharan
    DFM: where's the proof of value? [Citation Graph (0, 0)][DBLP]
    DAC, 2006, pp:1061-1062 [Conf]
  16. Ellen Sentovich, Raul Camposano, Jim Douglas, Aurangzeb Khan
    Business models in IP, software licensing, and services. [Citation Graph (0, 0)][DBLP]
    DAC, 2004, pp:264- [Conf]
  17. Narendra V. Shenoy, Jamil Kawa, Raul Camposano
    Design automation for mask programmable fabrics. [Citation Graph (0, 0)][DBLP]
    DAC, 2004, pp:192-197 [Conf]
  18. Ron Wilson, Joe Gianelli, Chris Hamlin, Ken McElvain, Steve Leibson, Ivo Bolson, Rich Tobias, Raul Camposano
    Structured/platform ASIC apprentices: which platform will survive your board room? [Citation Graph (0, 0)][DBLP]
    DAC, 2005, pp:887-888 [Conf]
  19. Raul Camposano
    Synthesis techniques for digital systems design. [Citation Graph (0, 0)][DBLP]
    DAC, 1985, pp:475-481 [Conf]
  20. A. Lock, Raul Camposano, Heinrich Meyr
    The programmable platform: does one size fit all? [Citation Graph (0, 0)][DBLP]
    DATE, 2001, pp:226-227 [Conf]
  21. Ralph H. J. M. Otten, Raul Camposano, Patrick Groeneveld
    Design Automation for Deepsubmicron: Present and Future. [Citation Graph (0, 0)][DBLP]
    DATE, 2002, pp:650-659 [Conf]
  22. Detlef Schmid, Raul Camposano, Wolfgang Rosenstiel
    Automatischer Entwurf hochintegrierter Schaltungen aus Beschreibungen der Schaltungsfunktion. [Citation Graph (0, 0)][DBLP]
    GI Jahrestagung, 1984, pp:391-406 [Conf]
  23. Jörg Wilberg, A. Kuth, Raul Camposano, Wolfgang Rosenstiel, Heinrich Theodor Vierhaus
    A Design Exploration Environment. [Citation Graph (0, 0)][DBLP]
    Great Lakes Symposium on VLSI, 1996, pp:77-80 [Conf]
  24. Raul Camposano, Andrew Seawright, Joseph Buck
    Modeling and synthesis of behavior, control and dataflow (tutorial). [Citation Graph (0, 0)][DBLP]
    ICCAD, 1997, pp:- [Conf]
  25. Heinz-Josef Eikerling, Ralf Hunstock, Raul Camposano
    Optimization of hierarchical designs using partitioning and resynthesis. [Citation Graph (0, 0)][DBLP]
    ICCAD, 1994, pp:707-712 [Conf]
  26. James H. Aylor, Raul Camposano, Michael A. Schuette, Wayne Wolf, Nam S. Woo
    The Future of Embedded System Design. [Citation Graph (0, 0)][DBLP]
    ICCD, 1992, pp:144-146 [Conf]
  27. Raul Camposano
    From IP to Platforms. [Citation Graph (0, 0)][DBLP]
    ICCD, 2002, pp:- [Conf]
  28. Jörg Wilberg, Raul Camposano, Ursula Westerholz, Uwe Steinhausen
    Design of an Embedded Video Compression System - A Quantitative Approach. [Citation Graph (0, 0)][DBLP]
    ICCD, 1994, pp:428-431 [Conf]
  29. Raul Camposano, Don MacMillen
    Design Technology for Systems-on-Chip. [Citation Graph (0, 0)][DBLP]
    VLSI-SOC, 2001, pp:87-96 [Conf]
  30. Raul Camposano
    Keynote Speaker. [Citation Graph (0, 0)][DBLP]
    ISPD, 2003, pp:3- [Conf]
  31. Raul Camposano
    The quarter micron challenge: intergrating physical and logic design. [Citation Graph (0, 0)][DBLP]
    ISPD, 1997, pp:211- [Conf]
  32. Raul Camposano
    The Expanding Use of Formal Techniques in Electronic Design. [Citation Graph (0, 0)][DBLP]
    ISQED, 2001, pp:25-26 [Conf]
  33. Raul Camposano
    Adding Manufacturability to the Quality of Results. [Citation Graph (0, 0)][DBLP]
    ISQED, 2006, pp:511- [Conf]
  34. Paul-Gerhard Plöger, Jörg Wilberg, Michel Langevin, Raul Camposano
    WWW based structuring of codesigns. [Citation Graph (0, 0)][DBLP]
    ISSS, 1995, pp:138-143 [Conf]
  35. Warren Savage, John Chilton, Raul Camposano
    IP Reuse in the System on a Chip Era. [Citation Graph (0, 0)][DBLP]
    ISSS, 2000, pp:2-8 [Conf]
  36. Hans Wojtkowiak, Raul Camposano
    Digital Systems Design with Nets: An Example. [Citation Graph (0, 0)][DBLP]
    Microcomputing, 1979, pp:135-154 [Conf]
  37. Raul Camposano
    Behavior-Preserving Transformations for High-Level Synthesis. [Citation Graph (0, 0)][DBLP]
    Hardware Specification, Verification and Synthesis, 1989, pp:106-128 [Conf]
  38. Raul Camposano
    Will the ASIC survive? [Citation Graph (0, 0)][DBLP]
    SBCCI, 2004, pp:5- [Conf]
  39. Raul Camposano, Warren Savage, John Chilton
    IP Reuse in System on a Chip Design. [Citation Graph (0, 0)][DBLP]
    VLSI Design, 2000, pp:20-0 [Conf]
  40. Raul Camposano
    From Behavior to Structure: High-Level Synthesis. [Citation Graph (0, 0)][DBLP]
    IEEE Design & Test of Computers, 1990, v:7, n:5, pp:8-19 [Journal]
  41. Raul Camposano, L. F. Saunders, R. M. Tabet
    VHDL as Input for High-Level Synthesis. [Citation Graph (0, 0)][DBLP]
    IEEE Design & Test of Computers, 1991, v:8, n:1, pp:43-49 [Journal]
  42. Juan Antonio Carballo, Yervant Zorian, Raul Camposano, Andrzej J. Strojwas, John Kibarian, Dennis Wassung, Alex Alexanian, Steve Wigley, Neil Kelly
    Guest Editors' Introduction: DFM Drives Changes in Design Flow. [Citation Graph (0, 0)][DBLP]
    IEEE Design & Test of Computers, 2005, v:22, n:3, pp:200-205 [Journal]
  43. Raul Camposano
    Path-based scheduling for synthesis. [Citation Graph (0, 0)][DBLP]
    IEEE Trans. on CAD of Integrated Circuits and Systems, 1991, v:10, n:1, pp:85-93 [Journal]
  44. Raul Camposano, Massoud Pedram
    Electronic design automation at the turn of the century: accomplishments and vision of the future. [Citation Graph (0, 0)][DBLP]
    IEEE Trans. on CAD of Integrated Circuits and Systems, 2000, v:19, n:12, pp:1401-1403 [Journal]
  45. Raul Camposano, Wolfgang Rosenstiel
    Synthesizing circuits from behavioural descriptions. [Citation Graph (0, 0)][DBLP]
    IEEE Trans. on CAD of Integrated Circuits and Systems, 1989, v:8, n:2, pp:171-180 [Journal]
  46. Uwe Hübner, Heinrich Theodor Vierhaus, Raul Camposano
    Partitioning and analysis of static digital CMOS circuits. [Citation Graph (0, 0)][DBLP]
    IEEE Trans. on CAD of Integrated Circuits and Systems, 1997, v:16, n:11, pp:1292-1310 [Journal]
  47. Don MacMillen, Raul Camposano, Dwight D. Hill, Thomas W. Williams
    An industrial view of electronic design automation. [Citation Graph (0, 0)][DBLP]
    IEEE Trans. on CAD of Integrated Circuits and Systems, 2000, v:19, n:12, pp:1428-1448 [Journal]
  48. Wolfgang Meyer, Raul Camposano
    Active timing multilevel fault-simulation with switch-level accuracy. [Citation Graph (0, 0)][DBLP]
    IEEE Trans. on CAD of Integrated Circuits and Systems, 1995, v:14, n:10, pp:1241-1256 [Journal]

  49. Does IC design have a future in the clouds? [Citation Graph (, )][DBLP]


  50. Redesign using state splitting. [Citation Graph (, )][DBLP]


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