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Paul M. Chau: [Publications] [Author Rank by year] [Co-authors] [Prefers] [Cites] [Cited by]
Publications of Author
- Jeremy Risher, Philip P. Dang, Paul M. Chau
Reconfigurable Hardware for Encryption. [Citation Graph (0, 0)][DBLP]
Applied Informatics, 1999, pp:554-557 [Conf] - Philip P. Dang, Paul M. Chau
Image encryption for multimedia applications. [Citation Graph (0, 0)][DBLP]
Computers and Their Applications, 2000, pp:203-206 [Conf] - Takeo Hamada, Chung-Kuan Cheng, Paul M. Chau
A Wire Length Estimation Technique Utilizing Neighborhood Density Equations. [Citation Graph (0, 0)][DBLP]
DAC, 1992, pp:57-61 [Conf] - Takeo Hamada, Chung-Kuan Cheng, Paul M. Chau
Prime: A Timing-Driven Placement Tool using A Piecewise Linear Resistive Network Approach. [Citation Graph (0, 0)][DBLP]
DAC, 1993, pp:531-536 [Conf] - P. H. Kelly, Kevin J. Page, Paul M. Chau
Rapid Prototyping of ASIC Based Systems. [Citation Graph (0, 0)][DBLP]
DAC, 1994, pp:460-465 [Conf] - Paul M. Chau, Gerald Clark, Anthony V. Sebald
Evolvable Hardware Control for Dynamic Reconfigurable and Adaptive Computing. [Citation Graph (0, 0)][DBLP]
Evolutionary Programming, 1998, pp:137-146 [Conf] - Jeanette F. Arrigo, Kevin J. Page, Paul M. Chau, N. C. Tien
Reconfigurable Processing for Robust Navigation and Control (Abstract). [Citation Graph (0, 0)][DBLP]
FPGA, 1998, pp:260- [Conf] - Laurence Goodby, Alex Orailoglu, Paul M. Chau
Microarchitectural Synthesis of Performance-Constrained, Low-Power VLSI Designs. [Citation Graph (0, 0)][DBLP]
ICCD, 1994, pp:323-326 [Conf] - Michael B. Bendak, Baernard A. Xavier, Paul M. Chau
A 1.2 GHz CMOS quadrature self-oscillating mixer. [Citation Graph (0, 0)][DBLP]
ISCAS (5), 1999, pp:434-437 [Conf] - Philip P. Dang, Paul M. Chau
A Feature Extraction Application on a Reconfigurable Image Processor. [Citation Graph (0, 0)][DBLP]
IVCNZ, 1998, pp:352-356 [Conf] - Steven S. Watkins, Paul M. Chau, Raoul Tawel, Bjorn Lambrigtsen, Mark Plutowski
A Hybrid Radial Basis Function Neurocomputer and Its Applications. [Citation Graph (0, 0)][DBLP]
NIPS, 1993, pp:850-857 [Conf] - Amir K. Hekmatpour, Alex Orailoglu, Paul M. Chau
Hierarchical Modeling of the VLSI Design Process. [Citation Graph (0, 0)][DBLP]
IEEE Expert, 1991, v:6, n:2, pp:56-70 [Journal] - Takeo Hamada, Chung-Kuan Cheng, Paul M. Chau
A wire length estimation technique utilizing neighborhood density equations. [Citation Graph (0, 0)][DBLP]
IEEE Trans. on CAD of Integrated Circuits and Systems, 1996, v:15, n:8, pp:912-922 [Journal] - Laurence Goodby, Alex Orailoglu, Paul M. Chau
Microarchitectural synthesis of performance-constrained, low-power VLSI designs. [Citation Graph (0, 0)][DBLP]
ACM Trans. Design Autom. Electr. Syst., 2002, v:7, n:1, pp:122-136 [Journal] - Dan Picker, Ronald D. Fellman, Paul M. Chau
An extension to the SCI flow control protocol for increased network efficiency. [Citation Graph (0, 0)][DBLP]
IEEE/ACM Trans. Netw., 1996, v:4, n:1, pp:71-85 [Journal] - Philip P. Dang, Paul M. Chau
FPGA architecture for noise filters on a reconfigurable processor. [Citation Graph (0, 0)][DBLP]
Computers and Their Applications, 1999, pp:250-253 [Conf]
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