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Publications of Author

1. Silvia M. Müller
   A Hardware Scheduler for Controlling Variable Latency Functional Units. [Citation Graph (0, 0)][DBLP]
   Applied Informatics, 1999, pp:581-583 [Conf]
   
2. Silvia M. Müller, Holger W. Leister, Peter Dell, Nikolaus Gerteis, Daniel Kroening
   The Impact of Hardware Scheduling Mechanismus on the Performance and Cost of Processor Designs. [Citation Graph (0, 0)][DBLP]
   ARCS, 1999, pp:65-73 [Conf]
   
3. Roger A. Golliver, Silvia M. Müller, Stuart F. Oberman, Martin S. Schmookler, Debjit Das Sarma, Andrew Beaumont-Smith
   Pain versus Gain in the Hardware Design of FPUs and Supercomputers. [Citation Graph (0, 0)][DBLP]
   IEEE Symposium on Computer Arithmetic, 2005, pp:39- [Conf]
   
4. Silvia M. Müller, Christian Jacobi, Hwa-Joon Oh, Kevin D. Tran, Scott R. Cottier, Brad W. Michael, Hiroo Nishikawa, Yonetaro Totsuka, Tatsuya Namatame, Naoka Yano, Takashi Machida, Sang H. Dhong
   The Vector Floating-Point Unit in a Synergistic Processor Element of a CELL Processor. [Citation Graph (0, 0)][DBLP]
   IEEE Symposium on Computer Arithmetic, 2005, pp:59-67 [Conf]
   
5. Silvia M. Müller, Per Stenström, Mateo Valero, Stamatis Vassiliadis
   Parallel Computer Architecture. [Citation Graph (0, 0)][DBLP]
   Euro-Par, 2000, pp:537-538 [Conf]
   
6. Silvia M. Müller, Wolfgang J. Paul
   Contributions of Theoretical Computer Science, Applied Computer Science and Numerical Mathematics to the Design of Parallel Computers. [Citation Graph (0, 0)][DBLP]
   IFIP Congress, 1989, pp:459-460 [Conf]
   
7. P. Bergmann, Jörg Keller, T. Malter, Silvia M. Müller, Wolfgang J. Paul, Thorsten Pöschel, O. Schlüter, L. Thiele
   Implementierung eines informationstheoretischen Ansatzes zur Bilderkennung. [Citation Graph (0, 0)][DBLP]
   Innovative Informations-Infrastrukturen, 1988, pp:187-197 [Conf]
   
8. Silvia M. Müller, Uzi Vishkin
   Conflict-Free Access to Multiple Single-Ported Register Files. [Citation Graph (0, 0)][DBLP]
   IPPS, 1997, pp:672-678 [Conf]
   
9. Silvia M. Müller, Wolfgang J. Paul
   Making the Original Scoreboard Mechanism Deadlock Free. [Citation Graph (0, 0)][DBLP]
   ISTCS, 1996, pp:92-99 [Conf]
   
10. Silvia M. Müller
    On the Scheduling of Variable Latency Functional Units. [Citation Graph (0, 0)][DBLP]
    SPAA, 1999, pp:148-154 [Conf]
    
11. Guy Even, Silvia M. Müller, Peter-Michael Seidel
    A dual precision IEEE floating-point multiplier. [Citation Graph (0, 0)][DBLP]
    Integration, 2000, v:29, n:2, pp:167-180 [Journal]
    
12. Silvia M. Müller, Wolfgang J. Paul
    On the Correctness of Hardware Scheduling Mechanisms for Out-of-Order Execution. [Citation Graph (0, 0)][DBLP]
    Journal of Circuits, Systems, and Computers, 1998, v:8, n:2, pp:301-314 [Journal]
    
13. Silvia M. Müller, Dieter Scheerer
    A method to parallelize tridiagonal solvers. [Citation Graph (0, 0)][DBLP]
    Parallel Computing, 1991, v:17, n:2-3, pp:181-188 [Journal]