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Hiroaki Nishi: [Publications] [Author Rank by year] [Co-authors] [Prefers] [Cites] [Cited by]

Publications of Author

  1. Tomohiro Otsuka, Konosuke Watanabe, Junichiro Tsuchiya, Hiroshi Harada, Junji Yamamoto, Hiroaki Nishi, Tomohiro Kudoh, Hideharu Amano
    Performance Evaluation of a Prototype of RHiNET-2: A Network-based Distributed Parallel Computing System. [Citation Graph (0, 0)][DBLP]
    Applied Informatics, 2003, pp:738-743 [Conf]
  2. Michiaki Muraoka, Hiroaki Nishi, Rafael K. Morizawa, Hideaki Yokota, Hideyuki Hamada
    Design methodology for SoC arthitectures based on reusable virtual cores. [Citation Graph (0, 0)][DBLP]
    ASP-DAC, 2004, pp:256-262 [Conf]
  3. Konosuke Watanabe, Tomohiro Otsuka, Junichiro Tsuchiya, Hideharu Amano, Hiroshi Harada, Junji Yamamoto, Hiroaki Nishi, Tomohiro Kudoh
    Performance Evaluation of RHiNET-2/NI: A Network Interface for Distributed Parallel Computing Systems. [Citation Graph (0, 0)][DBLP]
    CCGRID, 2003, pp:318-325 [Conf]
  4. Hiroaki Nishi, Koji Tasho, Junji Yamamoto, Tomohiro Kudoh, Hideharu Amano
    A Local Area System Network RHinet-1: A Network for High Performance Parallel Computing. [Citation Graph (0, 0)][DBLP]
    HPDC, 2000, pp:296-297 [Conf]
  5. Noboru Tanabe, Junji Yamamoto, Hiroaki Nishi, Tomohiro Kudoh, Yoshihiro Hamada, Hironori Nakajo, Hideharu Amano
    On-the-fly Sending: A Low Latency High Bandwidth Message Transfer Mechanism. [Citation Graph (0, 0)][DBLP]
    ISPAN, 2000, pp:186-194 [Conf]
  6. Yoshihiro Hamada, Hiroaki Nishi, Akira Kitamura, Noboru Tanabe, Hideharu Amano, Hironori Nakajo
    A Packet Forwarding Layer for DIMMnet and its Hardware Implementation. [Citation Graph (0, 0)][DBLP]
    PDPTA, 2005, pp:461-467 [Conf]
  7. Noboru Tanabe, Junji Yamamoto, Hiroaki Nishi, Tomohiro Kudoh, Yoshihiro Hamada, Hironori Nakajo, Hideharu Amano
    Low Latency High Bandwidth Message Transfer Mechanisms for a Network Interface Plugged into a Memory Slot. [Citation Graph (0, 0)][DBLP]
    Cluster Computing, 2002, v:5, n:1, pp:7-17 [Journal]
  8. S. Nishimura, K. Harasawa, N. Matsudaira, S. Akutsu, Tomohiro Kudoh, Hiroaki Nishi, Hideharu Amano
    RHiNET-2/SW a Hight-throughput, Compact Network-switch Using 8.8-Gbit/s Optical Interconnection. [Citation Graph (0, 0)][DBLP]
    New Generation Comput., 2000, v:18, n:2, pp:187-0 [Journal]
  9. Hiroaki Nishi, Koji Tasho, Tomohiro Kudoh, Hideharu Amano
    A network switch for supporting high-performance parallel processing by computers distributed in local areas. [Citation Graph (0, 0)][DBLP]
    Systems and Computers in Japan, 2001, v:32, n:14, pp:24-33 [Journal]
  10. Yulu Yang, Akira Funahashi, Akiya Jouraku, Hiroaki Nishi, Hideharu Amano, Toshinori Sueyoshi
    Recursive Diagonal Torus: An Interconnection Network for Massively Parallel Computers. [Citation Graph (0, 0)][DBLP]
    IEEE Trans. Parallel Distrib. Syst., 2001, v:12, n:7, pp:701-715 [Journal]
  11. Konosuke Watanabe, Tomohiro Otsuka, Junichiro Tsuchiya, Hiroaki Nishi, Junji Yamamoto, Noboru Tanabe, Tomohiro Kudoh, Hideharu Amano
    Martini: A Network Interface Controller Chip for High Performance Computing with Distributed PCs. [Citation Graph (0, 0)][DBLP]
    IEEE Trans. Parallel Distrib. Syst., 2007, v:18, n:9, pp:1282-1295 [Journal]

  12. MEMOnet : Network interface plugged into a memory slot. [Citation Graph (, )][DBLP]


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