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Hiroaki Kobayashi: [Publications] [Author Rank by year] [Co-authors] [Prefers] [Cites] [Cited by]

Publications of Author

  1. Hiroyuki Takizawa, Taira Nakajima, Kentaro Sano, Hiroaki Kobayashi
    A Comparison Study of Vector Quantization Codebook Design Algorithms based on the Equidistortion Principle. [Citation Graph (0, 0)][DBLP]
    Applied Informatics, 2003, pp:255-261 [Conf]
  2. Hiroshi Sasaki, Hitoshi Maruyama, Hideaki Tsukioka, Nobuyoshi Shoji, Hiroaki Kobayashi, Tadao Nakamura
    Reconfigurable synchronized dataflow processor. [Citation Graph (0, 0)][DBLP]
    ASP-DAC, 2000, pp:27-28 [Conf]
  3. Kouji Takano, Takehito Sasaki, Nobuyuki Oba, Hiroaki Kobayashi, Tadao Nakamura
    Automated Design of Wave Pipelined Multiport Register Files. [Citation Graph (0, 0)][DBLP]
    ASP-DAC, 1998, pp:197-202 [Conf]
  4. Hiroaki Kobayashi
    A Cached Frame Buffer System for Object-Space parallel Processing System. [Citation Graph (0, 0)][DBLP]
    Computer Graphics International, 1997, pp:146-155 [Conf]
  5. Kosuke Ikeda, Hiroyuki Takizawa, Hiroaki Kobayashi
    An Incremental Photon-Mapping Algorithm for Fast Walk-Through Animations. [Citation Graph (0, 0)][DBLP]
    Computer Graphics and Imaging, 2005, pp:1-7 [Conf]
  6. Tadao Nakamura, Hiroaki Kobayashi, Jun Miyajima, Noboru Endo, Yoshiharu Shigei
    A Language Processor of an Intelligent Link System. [Citation Graph (0, 0)][DBLP]
    ICC (2), 1984, pp:527-530 [Conf]
  7. Hiroaki Kobayashi, Ken-ichi Suzuki, Kentaro Sano, Yoshiyuki Kaeriyama, Yasumasa Saida, Nobuyuki Oba, Tadao Nakamura
    3DCGiRAM: An Intelligent Memory Architecture for Photo-Realistic Image Synthesis. [Citation Graph (0, 0)][DBLP]
    ICCD, 2001, pp:462-467 [Conf]
  8. Tomoyuki Saoi, Hideaki Goto, Hiroaki Kobayashi
    Text Detection in Color Scene Images based on Unsupervised Clustering of Multi-channel Wavelet Features. [Citation Graph (0, 0)][DBLP]
    ICDAR, 2005, pp:690-694 [Conf]
  9. Hiroki Shiratori, Hideaki Goto, Hiroaki Kobayashi
    An Efficient Text Capture Method for Moving Robots Using DCT Feature and Text Tracking. [Citation Graph (0, 0)][DBLP]
    ICPR (2), 2006, pp:1050-1053 [Conf]
  10. Nobuyuki Oba, Hiroaki Kobayashi, Tadao Nakamura
    An Adaptive Network Routing Method by Electrical-Circuit Modeling. [Citation Graph (0, 0)][DBLP]
    INFOCOM, 1993, pp:586-592 [Conf]
  11. Hiroaki Kobayashi, Hitoshi Yamauchi, Yuichiro Toh, Tadao Nakamura
    A Hierarchical Parallel Processing System for the Multipass-Rendering Method. [Citation Graph (0, 0)][DBLP]
    IPPS, 1996, pp:62-67 [Conf]
  12. Akihiro Musa, Hiroyuki Takizawa, Koki Okabe, Takashi Soga, Hiroaki Kobayashi
    Implications of Memory Performance for Highly Efficient Supercomputing of Scientific Applications. [Citation Graph (0, 0)][DBLP]
    ISPA, 2006, pp:845-858 [Conf]
  13. Hiroyuki Takizawa, Hiroaki Kobayashi
    Multi-grain Parallel Processing of Data-Clustering on Programmable Graphics Hardware. [Citation Graph (0, 0)][DBLP]
    ISPA, 2004, pp:16-27 [Conf]
  14. Hong Wang, Hiroyuki Takizawa, Hiroaki Kobayashi
    A Workflow Management Mechanism for Peer-to-Peer Computing Platforms. [Citation Graph (0, 0)][DBLP]
    ISPA, 2005, pp:827-832 [Conf]
  15. Hiroyuki Takizawa, Hiroaki Kobayashi
    A Fast Computation Scheme of Partial Distortion Entropy Updating. [Citation Graph (0, 0)][DBLP]
    ITCC (1), 2004, pp:736-741 [Conf]
  16. Hitoshi Yamauchi, Atusi Maeda, Hiroaki Kobayashi
    Developing a practical parallel multi-pass renderer in Java and C++: toward a Grande application in Java. [Citation Graph (0, 0)][DBLP]
    Java Grande, 2000, pp:126-133 [Conf]
  17. Kentaro Sano, Shintaro Momose, Hiroyuki Takizawa, Taira Nakajima, C. D. Lima, Hiroaki Kobayashi, Tadao Nakamura
    Parallel Algorithm for the Law-of-the-Jungle Learning to the Fast Design of Optimal Codebooks. [Citation Graph (0, 0)][DBLP]
    IASTED PDCS, 2002, pp:578-582 [Conf]
  18. Tsutomu Inaba, Takuro Okawa, Yoshitomo Murata, Hiroyuki Takizawa, Hiroaki Kobayashi
    Design and Implementation of an Efficient Search Mechanism Based on the Hybrid P2P Model for Ubiquitous Computing Systems. [Citation Graph (0, 0)][DBLP]
    SAINT, 2006, pp:45-53 [Conf]
  19. Hiroaki Kobayashi, Hiroyuki Takizawa, Tsutomu Inaba, Yasuaki Takizawa
    A Self-Organizing Overlay Network to Exploit the Locality of Interests for Effective Resource Discovery in P2P Systems. [Citation Graph (0, 0)][DBLP]
    SAINT, 2005, pp:246-255 [Conf]
  20. Yoshitomo Murata, Hiroyuki Takizawa, Tsutomu Inaba, Hiroaki Kobayashi
    A distributed and cooperative load balancing mechanism for large-scale P2P systems. [Citation Graph (0, 0)][DBLP]
    SAINT Workshops, 2006, pp:126-129 [Conf]
  21. Kentaro Sano, Shintaro Momose, Hiroyuki Takizawa, Hiroaki Kobayashi, Tadao Nakamura
    Efficient parallel processing of competitive learning algorithms. [Citation Graph (0, 0)][DBLP]
    Parallel Computing, 2004, v:30, n:12, pp:1361-1383 [Journal]
  22. Takuya Nakaike, Takehito Sasaki, Masayuki Katahira, Hiroaki Kobayashi, Tadao Nakamura
    A scheduling method for instruction-level parallel processing of vectorand scalar instructions. [Citation Graph (0, 0)][DBLP]
    Systems and Computers in Japan, 1999, v:30, n:13, pp:23-33 [Journal]
  23. Ken-ichi Suzuki, Nobuyuki Oba, Shigenori Shimizu, Hiroaki Kobayashi, Tadao Nakamura
    Time stamp invalidation of TLB-unified cache and its performance evaluation. [Citation Graph (0, 0)][DBLP]
    Systems and Computers in Japan, 1999, v:30, n:11, pp:94-106 [Journal]
  24. Masafumi Takahashi, Nobuyuki Oba, Hiroaki Kobayashi, Tadao Nakamura
    Decoupled modified-bit cache. [Citation Graph (0, 0)][DBLP]
    Systems and Computers in Japan, 1997, v:28, n:6, pp:49-59 [Journal]
  25. Hiroaki Kobayashi, Isao Kotera, Hiroyuki Takizawa
    Locality analysis to control dynamically way-adaptable caches. [Citation Graph (0, 0)][DBLP]
    SIGARCH Computer Architecture News, 2005, v:33, n:3, pp:25-32 [Journal]
  26. Hiroyuki Takizawa, Hiroaki Kobayashi
    Hierarchical parallel processing of large scale data clustering on a PC cluster with GPU co-processing. [Citation Graph (0, 0)][DBLP]
    The Journal of Supercomputing, 2006, v:36, n:3, pp:219-234 [Journal]
  27. Hiroaki Kobayashi, Satoshi Nishimura, Hideyuki Kubota, Tadao Nakamura, Yoshiharu Shigei
    Load balancing strategies for a parallel ray-tracing system based on constant subdivision. [Citation Graph (0, 0)][DBLP]
    The Visual Computer, 1988, v:4, n:4, pp:197-209 [Journal]
  28. Hiroaki Kobayashi, Tadao Nakamura, Yoshiharu Shigei
    Parallel processing of an object space for image synthesis using ray tracing. [Citation Graph (0, 0)][DBLP]
    The Visual Computer, 1987, v:3, n:1, pp:13-22 [Journal]
  29. Hong Wang, Hiroyuki Takizawa, Hiroaki Kobayashi
    A dependable Peer-to-Peer computing platform. [Citation Graph (0, 0)][DBLP]
    Future Generation Comp. Syst., 2007, v:23, n:8, pp:939-955 [Journal]
  30. Hiroyuki Takizawa, Hiroaki Kobayashi
    Partial distortion entropy maximization for online data clustering. [Citation Graph (0, 0)][DBLP]
    Neural Networks, 2007, v:20, n:7, pp:819-831 [Journal]

  31. A Performance Study of Secure Data Mining on the Cell Processor. [Citation Graph (, )][DBLP]


  32. SPRAT: Runtime processor selection for energy-aware computing. [Citation Graph (, )][DBLP]


  33. Implementation and evaluation of a distributed and cooperative load-balancing mechanism for dependable volunteer computing. [Citation Graph (, )][DBLP]


  34. Multi-core data streaming architecture for ray tracing. [Citation Graph (, )][DBLP]


  35. Design and control of underactuated tendon-driven mechanisms. [Citation Graph (, )][DBLP]


  36. A Utility-Based Double Auction Mechanism for Efficient Grid Resource Allocation. [Citation Graph (, )][DBLP]


  37. Effects of MSHR and Prefetch Mechanisms on an On-Chip Cache of the Vector Architecture. [Citation Graph (, )][DBLP]


  38. CheCUDA: A Checkpoint/Restart Tool for CUDA Applications. [Citation Graph (, )][DBLP]


  39. Consideration of Resource Access History for Optimizing Overlay Networks in P2P-Based Resource Discovery. [Citation Graph (, )][DBLP]


  40. A Reliability Model for Result Checking in Volunteer Computing. [Citation Graph (, )][DBLP]


  41. Performance evaluation of NEC SX-9 using real science and engineering applications. [Citation Graph (, )][DBLP]


  42. Evaluation of fine grain 3-D integrated arithmetic units. [Citation Graph (, )][DBLP]


  43. 3D on-chip memory for the vector architecture. [Citation Graph (, )][DBLP]


  44. Evaluating Computational Performance of Backpropagation Learning on Graphics Hardware. [Citation Graph (, )][DBLP]


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