The SCEAS System
Navigation Menu

Search the dblp DataBase

Title:
Author:

Gert J. Eilenberger: [Publications] [Author Rank by year] [Co-authors] [Prefers] [Cites] [Cited by]

Publications of Author

  1. Thomas R. Banniza, Gert J. Eilenberger, Bart Pauwels, Yves Therasse
    Design and Technology Aspects of VLSI's for ATM Switches. [Citation Graph (0, 0)][DBLP]
    IEEE Journal on Selected Areas in Communications, 1991, v:9, n:8, pp:1255-1264 [Journal]
  2. Francesco Masetti, J. Benoit, François Brillouet, Jean-Michel Gabriagues, Amaury Jourdan, Monique Renaud, Dietrich Böttle, Gert J. Eilenberger, Klaus Wünstel, Michael Schilling, Dominique Chiaroni, Paulette Gavignet, J. B. Jacob, Giampaolo Bendelli, Paola Cinato, Piero Gambini, Mario Puleo, T. Martinson, P. Vogel, Terji Durhuus, C. Joergensen, Kristian E. Stubkjaer, Roel Baets, Peter Van Daele, J. C. Bouley, R. Lefèvre, M. Bachmann, Werner Hunziker, Hans Melchior, A. McGuire, F. Ratovelomanana, Nakita Vodjdani
    High Speed, High Capacity ATM Optical Switches for Future Telecommunication Transport Networks (Invited Paper). [Citation Graph (0, 0)][DBLP]
    IEEE Journal on Selected Areas in Communications, 1996, v:14, n:5, pp:979-998 [Journal]

  3. Dimensioning of carrier grade packet transport for simple network operation. [Citation Graph (, )][DBLP]


Search in 0.001secs, Finished in 0.001secs
NOTICE1
System may not be available sometimes or not working properly, since it is still in development with continuous upgrades
NOTICE2
The rankings that are presented on this page should NOT be considered as formal since the citation info is incomplete in DBLP
 
System created by asidirop@csd.auth.gr [http://users.auth.gr/~asidirop/] © 2002
for Data Engineering Laboratory, Department of Informatics, Aristotle University © 2002