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Hong An: [Publications] [Author Rank by year] [Co-authors] [Prefers] [Cites] [Cited by]

Publications of Author

  1. Bo Liang, Hong An, Fang Lu, Rui Guo
    Improving Latency Tolerance of Network Processors Through Simultaneous Multithreading. [Citation Graph (0, 0)][DBLP]
    APPT, 2005, pp:61-70 [Conf]
  2. Xiangchuan Chen, Hong An, Shirong Zheng
    Broadcasting Under Network Ignorance Scenario. [Citation Graph (0, 0)][DBLP]
    SAC (2), 2000, pp:615-619 [Conf]
  3. Hong An, Hong Li, Ming Wu, Yongchang Ji, Zhihui Chen, Feng Wang, Guoliang Chen
    A Java/CORBA Based Universal Framework for Super Server User-End Integrated Environments. [Citation Graph (0, 0)][DBLP]
    TOOLS (31), 1999, pp:336-341 [Conf]
  4. Feng Wang, Qilong Zheng, Hong An, Guoliang Chen
    A Parallel and Distributed Debugger Implemented with Java. [Citation Graph (0, 0)][DBLP]
    TOOLS (31), 1999, pp:342-347 [Conf]
  5. Yuan Liu, Hong An, Bo Liang, Li Wang
    An Online Profile Guided Optimization Approach for Speculative Parallel Threading. [Citation Graph (0, 0)][DBLP]
    Asia-Pacific Computer Systems Architecture Conference, 2007, pp:28-39 [Conf]
  6. Yaobin Wang, Hong An, Bo Liang, Li Wang, Ming Cong, Yongqing Ren
    Balancing Thread Partition for Efficiently Exploiting Speculative Thread-Level Parallelism. [Citation Graph (0, 0)][DBLP]
    APPT, 2007, pp:40-49 [Conf]

  7. Dynamic Resource Tuning for Flexible Core Chip Multiprocessors. [Citation Graph (, )][DBLP]

  8. Pattern-Unit Based Regular Expression Matching with Reconfigurable Function Unit. [Citation Graph (, )][DBLP]

  9. The Mapping Framework and Optimizing Strategy for Block Cryptography Algorithms on Cell Broadband Engine. [Citation Graph (, )][DBLP]

  10. Scaling the Performance of Tiled Processor Architectures with On-Chip-Network Topology. [Citation Graph (, )][DBLP]

  11. CuHMMer: A load-balanced CPU-GPU cooperative bioinformatics application. [Citation Graph (, )][DBLP]

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