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Publications of Author

1. Toshiro Mise, Masaaki Hashimoto, Keiichi Katamine, Yasufumi Shinyashiki, Naoyasu Ubayashi, Takako Nakatani
   An Analysis Method with Failure Scenario Matrix for Specifying Unexpected Obstacles in Embedded Systems. [Citation Graph (0, 0)][DBLP]
   APSEC, 2005, pp:447-456 [Conf]
   
2. Masanobu Umeda, Keiichi Katamine, Isao Nagasawa, Masaaki Hashimoto, Osamu Takata
   Multi-threading Inside Prolog for Knowledge-Based Enterprise Applications. [Citation Graph (0, 0)][DBLP]
   INAP, 2005, pp:200-214 [Conf]
   
3. Yasufumi Shinyashiki, Toshiro Mise, Masaaki Hashimoto, Keiichi Katamine, Naoyasu Ubayashi, Takako Nakatani
   A Suggestion for Analysis of Unexpected Obstacles in Embedded System. [Citation Graph (0, 0)][DBLP]
   HCI (8), 2007, pp:755-768 [Conf]
   
4. 
   Enhancing the ESIM (Embedded Systems Improving Method) by Combining Information Flow Diagram with Analysis Matrix for Efficient Analysis of Unexpected Obstacles in Embedded Software. [Citation Graph (, )][DBLP]
   
   
5. 
   Project Management Patterns to Prevent Schedule Delay Caused by Requirements Changes - Empirical Study on a Successful Project. [Citation Graph (, )][DBLP]
   
   
6. 
   Towards a Strategic Requirements Elicitation - A Proposal of the PRINCE Model. [Citation Graph (, )][DBLP]
   
   
7. 
   B-Prolog: A High Performance Prolog Compiler. [Citation Graph (, )][DBLP]
   
   
8. 
   A Domain-Specific Conceptual Model in Building Design. [Citation Graph (, )][DBLP]
   
   
9. 
   A Case Study: Requirements Elicitation Processes throughout a Project. [Citation Graph (, )][DBLP]
   
   
10. 
    A Discussion on Domain Modeling in an Example of Motivation-Based Human Resource Management. [Citation Graph (, )][DBLP]
    
    
11. 
    A Conceptual Model for Analysis Method of Extracting Unexpected Obstacles of Embedded Systems. [Citation Graph (, )][DBLP]
    
    
12. 
    A Method for Extracting Unexpected Scenarios of Embedded Systems. [Citation Graph (, )][DBLP]
    
    
13. 
    Information Flow Diagram and Analysis Method for Unexpected Obstacle Specification of Embedded Software. [Citation Graph (, )][DBLP]