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Shohei Abe: [Publications] [Author Rank by year] [Co-authors] [Prefers] [Cites] [Cited by]

Publications of Author

  1. Katsuaki Deguchi, Shohei Abe, Masayasu Suzuki, Kenichiro Anjo, Toru Awashima, Hideharu Amano
    Implementing core tasks of JPEG2000 Encoder on the Dynamically Reconfigurable Processor. [Citation Graph (0, 0)][DBLP]
    ARCS Workshops, 2005, pp:12-18 [Conf]
  2. Hideharu Amano, Shohei Abe, Yohei Hasegawa, Katsuaki Deguchi, Masayasu Suzuki
    Performance and Cost Analysis of Time-Multiplexed Execution on the Dynamically Reconfigurable Processor. [Citation Graph (0, 0)][DBLP]
    FCCM, 2005, pp:315-316 [Conf]
  3. Yohei Hasegawa, Shohei Abe, Katsuaki Deguchi, Masayasu Suzuki, Hideharu Amano
    Time-multiplexed execution on the dynamically reconfigurable processor: a performance/cost evaluation. [Citation Graph (0, 0)][DBLP]
    FPGA, 2005, pp:265- [Conf]
  4. Hideharu Amano, Shohei Abe, Katsuaki Deguchi, Yohei Hasegawa
    An I/O mechanism on a Dynamically Reconfigurable Processor - Which should be moved: Data or Configuration? [Citation Graph (0, 0)][DBLP]
    FPL, 2005, pp:347-352 [Conf]
  5. Yohei Hasegawa, Shohei Abe, Hiroki Matsutani, Hideharu Amano, Kenichiro Anjo, Toru Awashima
    An Adaptive Cryptographic Accelerator for IPsec on Dynamically Reconfigurable Processor. [Citation Graph (0, 0)][DBLP]
    FPT, 2005, pp:163-170 [Conf]
  6. Masayasu Suzuki, Yohei Hasegawa, Vu Manh Tuan, Shohei Abe, Hideharu Amano
    A cost-effective context memory structure for dynamically reconfigurable processors. [Citation Graph (0, 0)][DBLP]
    IPDPS, 2006, pp:- [Conf]
  7. Yohei Hasegawa, Shohei Abe, Shunsuke Kurotaki, Vu Manh Tuan, Naohiro Katsura, T. Nakamura, T. Nishimura, Hideharu Amano
    Performance and power analysis of time-multiplexed execution on dynamically reconfigurable processor. [Citation Graph (0, 0)][DBLP]
    IPDPS, 2006, pp:- [Conf]
  8. Hideharu Amano, Yohei Hasegawa, Shohei Abe, K. Ishikawa, Shunsuke Tsutsumi, Shunsuke Kurotaki, T. Nakamura, T. Nishimura
    A Context Dependent Clock Control Mechanism for Dynamically Reconfigurable Processors. [Citation Graph (0, 0)][DBLP]
    FPL, 2006, pp:1-6 [Conf]

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