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Publications of Author

1. Christophe Bobda, Ali Ahmadinia, Kurapati Rajesham, Mateusz Majer, Adronis Niyonkuru
   Partial Configuration Design and Implementation Challenges on Xilinx Virtex FPGAs. [Citation Graph (0, 0)][DBLP]
   ARCS Workshops, 2005, pp:61-66 [Conf]
   
2. Mateusz Majer, Ali Ahmadinia, Christophe Bobda, Jürgen Teich
   A Flexible Reconfiguration Manager for the Erlangen Slot Machine. [Citation Graph (0, 0)][DBLP]
   ARCS Workshops, 2006, pp:183-194 [Conf]
   
3. Tudor Murgan, Mihail Petrov, Mateusz Majer, Peter Zipf, Manfred Glesner, Ulrich Heinkel, Jörg Pleickhardt, Bernd Bleisteiner
   Adaptive architectures for an OTN processor: reducing design costs through reconfigurability and multiprocessing. [Citation Graph (0, 0)][DBLP]
   Conf. Computing Frontiers, 2004, pp:404-418 [Conf]
   
4. Jan van der Veen, Sándor P. Fekete, Mateusz Majer, Ali Ahmadinia, Christophe Bobda, Frank Hannig, Jürgen Teich
   Defragmenting the Module Layout of a Partially Reconfigurable Device. [Citation Graph (0, 0)][DBLP]
   ERSA, 2005, pp:92-104 [Conf]
   
5. Christophe Bobda, Mateusz Majer, Ali Ahmadinia, Thomas Haller, André Linarth, Jürgen Teich, Sándor P. Fekete, Jan van der Veen
   The Erlangen Slot Machine: A Highly Flexible FPGA-Based Reconfigurable Platform. [Citation Graph (0, 0)][DBLP]
   FCCM, 2005, pp:319-320 [Conf]
   
6. Christophe Bobda, Ali Ahmadinia, Mateusz Majer, Jürgen Teich, Sándor P. Fekete, Jan van der Veen
   DyNoC: A Dynamic Infrastructure for Communication in Dynamically Reconfigurable Devices. [Citation Graph (0, 0)][DBLP]
   FPL, 2005, pp:153-158 [Conf]
   
7. Christophe Bobda, Mateusz Majer, Dirk Koch, Ali Ahmadinia, Jürgen Teich
   A Dynamic NoC Approach for Communication in Reconfigurable Devices. [Citation Graph (0, 0)][DBLP]
   FPL, 2004, pp:1032-1036 [Conf]
   
8. Christophe Bobda, Mateusz Majer, Ali Ahmadinia, Thomas Haller, André Linarth, Jürgen Teich
   The Erlangen Slot Machine: Increasing Flexibility in FPGA-Based Reconfigurable Platforms. [Citation Graph (0, 0)][DBLP]
   FPT, 2005, pp:37-42 [Conf]
   
9. Mateusz Majer, Christophe Bobda, Ali Ahmadinia, Jürgen Teich
   Packet Routing in Dynamically Changing Networks on Chip. [Citation Graph (0, 0)][DBLP]
   IPDPS, 2005, pp:- [Conf]
   
10. Ali Ahmadinia, Christophe Bobda, Ji Ding, Mateusz Majer, Jürgen Teich, Sándor P. Fekete, Jan van der Veen
    A Practical Approach for Circuit Routing on Dynamic Reconfigurable Devices. [Citation Graph (0, 0)][DBLP]
    IEEE International Workshop on Rapid System Prototyping, 2005, pp:84-90 [Conf]
    
11. Ali Ahmadinia, Christophe Bobda, Dirk Koch, Mateusz Majer, Jürgen Teich
    Task scheduling for heterogeneous reconfigurable computers. [Citation Graph (0, 0)][DBLP]
    SBCCI, 2004, pp:22-27 [Conf]
    
12. Sándor P. Fekete, Jan van der Veen, Mateusz Majer, Jürgen Teich
    Minimizing Communication Cost for Reconfigurable Slot Modules. [Citation Graph (0, 0)][DBLP]
    FPL, 2006, pp:1-6 [Conf]
    
13. Mateusz Majer
    An FPGA-Based Dynamically Reconfigurable Platform: From Concept to Realization. [Citation Graph (0, 0)][DBLP]
    FPL, 2006, pp:1-2 [Conf]
    
14. Ali Ahmadinia, Christophe Bobda, Ji Ding, Mateusz Majer, Jürgen Teich, Sándor P. Fekete, Jan van der Veen
    A Practical Approach for Circuit Routing on Dynamic Reconfigurable Devices [Citation Graph (0, 0)][DBLP]
    CoRR, 2005, v:0, n:, pp:- [Journal]
    
15. Josef Angermeier, Diana Göhringer, Mateusz Majer, Jürgen Teich, Sándor P. Fekete, Jan van der Veen
    The Erlangen Slot Machine - A Platform for Interdisciplinary Research in Dynamically Reconfigurable Computing (ESM - Eine Hardware-Plattform für interdisziplinäre Forschung im Bereich des dynamischen rekonfigurierbaren Rechnens). [Citation Graph (0, 0)][DBLP]
    it - Information Technology, 2007, v:49, n:3, pp:143-0 [Journal]
    
16. Mateusz Majer, Jürgen Teich, Ali Ahmadinia, Christophe Bobda
    The Erlangen Slot Machine: A Dynamically Reconfigurable FPGA-based Computer. [Citation Graph (0, 0)][DBLP]
    VLSI Signal Processing, 2007, v:47, n:1, pp:15-31 [Journal]
    
17. 
    Bridging the Gap between Relocatability and Available Technology: The Erlangen Slot Machine. [Citation Graph (, )][DBLP]
    
    
18. 
    Fine grain reconfigurable architectures. [Citation Graph (, )][DBLP]
    
    
19. 
    Co-design Architecture and Implementation for Point-Based Rendering on FPGAs. [Citation Graph (, )][DBLP]
    
    
20. 
    Reconfigurable HW/SW Architecture of a Real-Time Driver Assistance System. [Citation Graph (, )][DBLP]
    
    
21. 
    DyNoC: A Dynamic Infrastructure for Communication in Dynamically Reconfigurable Devices [Citation Graph (, )][DBLP]