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Michel Auguin: [Publications] [Author Rank by year] [Co-authors] [Prefers] [Cites] [Cited by]

Publications of Author

  1. Ghaffari Fakhreddine, Michel Auguin
    An efficient on-line Approach for on-chip HW/SW partitioner and scheduler. [Citation Graph (0, 0)][DBLP]
    ARCS Workshops, 2006, pp:215-223 [Conf]
  2. Karim Ben Chehida, Michel Auguin
    A SW/Configware Codesign Methodology for Control Dominated Applications. [Citation Graph (0, 0)][DBLP]
    ASAP, 2005, pp:56-64 [Conf]
  3. Michel Auguin, Luc Bianco, L. Capella, Emmanuel Gresset
    Partitioning Conditional Data Flow Graphs for Embedded System Design. [Citation Graph (0, 0)][DBLP]
    ASAP, 2000, pp:339-348 [Conf]
  4. Karim Ben Chehida, Michel Auguin
    HW / SW partitioning approach for reconfigurable system design. [Citation Graph (0, 0)][DBLP]
    CASES, 2002, pp:247-251 [Conf]
  5. Guy Gogniat, Michel Auguin, Luc Bianco, Alain Pegatoquet
    Communication synthesis and HW/SW integration for embedded system design. [Citation Graph (0, 0)][DBLP]
    CODES, 1998, pp:49-53 [Conf]
  6. Michel Auguin, Mohamed Belhadj, Judith Benzakki, C. Carrière, Guy Durrieu, Thierry Gautier, Michel Israël, Paul Le Guernic, Michel Lemaître, E. Martin, P. Quinton, Laurence Rideau, François Rousseau, Olivier Sentieys
    Towards a multi-formalism framework for architectural synthesis: the ASAR project. [Citation Graph (0, 0)][DBLP]
    CODES, 1994, pp:25-32 [Conf]
  7. Michel Auguin, Fernand Boéri, C. Carrière
    Automatic exploration of VLIW processor architectures from a designer's experience based specification. [Citation Graph (0, 0)][DBLP]
    CODES, 1994, pp:108-115 [Conf]
  8. Luc Bianco, Michel Auguin, Guy Gogniat, Alain Pegatoquet
    A path analysis based partitioning for time constrained embedded systems. [Citation Graph (0, 0)][DBLP]
    CODES, 1998, pp:85-89 [Conf]
  9. Guy Gogniat, Michel Auguin, Cécile Belleudy
    A generic multi-unit architecture for codesign methodologies. [Citation Graph (0, 0)][DBLP]
    CODES, 1997, pp:23-28 [Conf]
  10. Alain Pegatoquet, Emmanuel Gresset, Michel Auguin, Luc Bianco
    Rapid Development of Optimized DSP Code from a High Level Description Through Software Estimations. [Citation Graph (0, 0)][DBLP]
    DAC, 1999, pp:823-826 [Conf]
  11. Ghaffari Fakhreddine, Michel Auguin, Abid Mohamed, Benjemaa Maher
    An Adaptive On-Line HW/SW Partitioning for Soft Real Time Reconfigurable Systems. [Citation Graph (0, 0)][DBLP]
    DSD, 2005, pp:379-382 [Conf]
  12. Hanene Ben Fradj, Cécile Belleudy, Michel Auguin
    Multi-Bank Main Memory Architecture with Dynamic Voltage Frequency Scaling for System Energy Optimization. [Citation Graph (0, 0)][DBLP]
    DSD, 2006, pp:89-96 [Conf]
  13. Luc Bianco, Michel Auguin, Alain Pegatoquet
    A Prototyping Method of Embedded Real Time Systems for Signal Processing Applications. [Citation Graph (0, 0)][DBLP]
    EUROMICRO, 1999, pp:1318-0 [Conf]
  14. G. Menez, Michel Auguin, Fernand Boéri, C. Carrière
    A partitioning algorithm for system-level synthesis. [Citation Graph (0, 0)][DBLP]
    ICCAD, 1992, pp:482-487 [Conf]
  15. G. Menez, Michel Auguin, Fernand Boéri, C. Carrière
    Contribution of Compilation Techniques to the Synthesis of Dedicated VLIW Architectures. [Citation Graph (0, 0)][DBLP]
    Architectures and Compilation Techniques for Fine and Medium Grain Parallelism, 1993, pp:217-228 [Conf]
  16. Patricia Guitton-Ouhamou, Cécile Belleudy, Michel Auguin
    Power Consumption Model for the DSP OAK Processor. [Citation Graph (0, 0)][DBLP]
    VLSI-SOC, 2001, pp:217-228 [Conf]
  17. Laurent Freund, Michel Israël, Frédéric Rousseau, J. M. Bergé, Michel Auguin, Cécile Belleudy, Guy Gogniat
    A Codesign Experiment in Acoustic Echo Cancellation: GMDFa. [Citation Graph (0, 0)][DBLP]
    ISSS, 1996, pp:83-0 [Conf]
  18. Patricia Guitton-Ouhamou, Cécile Belleudy, Michel Auguin
    Energy Optimization in a HW/SW Tool: Design of Low. [Citation Graph (0, 0)][DBLP]
    IWSOC, 2003, pp:38-43 [Conf]
  19. Hanene Ben Fradj, Cécile Belleudy, Michel Auguin
    System Level Multi-bank Main Memory Configuration for Energy Reduction. [Citation Graph (0, 0)][DBLP]
    PATMOS, 2006, pp:84-94 [Conf]
  20. Farooq Muhammad, Fabrice Muller, Michel Auguin
    Contentions-conscious dynamic but deterministic scheduling of computational and communication tasks. [Citation Graph (0, 0)][DBLP]
    SAC, 2006, pp:1487-1492 [Conf]
  21. Hanene Ben Fradj, Sébastien Icart, Cécile Belleudy, Michel Auguin
    Energy Optimization of a Multi-bank Main Memory. [Citation Graph (0, 0)][DBLP]
    SAMOS, 2006, pp:196-205 [Conf]
  22. Karim Ben Chehida, Michel Auguin
    Partitioning Reactive Data Flow Applications On Dynamically Reconfigurable Systems. [Citation Graph (0, 0)][DBLP]
    VLSI-SOC, 2003, pp:282-287 [Conf]
  23. Hanene Ben Fradj, Asmaa el Ouardighi, Cécile Belleudy, Michel Auguin
    Energy aware memory architecture configuration. [Citation Graph (0, 0)][DBLP]
    SIGARCH Computer Architecture News, 2005, v:33, n:3, pp:3-9 [Journal]
  24. Fernand Boéri, Michel Auguin
    OPSILA: A Vector and Parallel Processor. [Citation Graph (0, 0)][DBLP]
    IEEE Trans. Computers, 1993, v:42, n:1, pp:76-82 [Journal]
  25. Laurent Freund, Michel Israël, Frédéric Rousseau, J. M. Bergé, Michel Auguin, Cécile Belleudy, Guy Gogniat
    A codesign experiment in acoustic echo cancellation GMDF. [Citation Graph (0, 0)][DBLP]
    ACM Trans. Design Autom. Electr. Syst., 1997, v:2, n:4, pp:365-383 [Journal]
  26. Guy Gogniat, Michel Auguin, Luc Bianco, Alain Pegatoquet
    A codesign back-end approach for embedded system design. [Citation Graph (0, 0)][DBLP]
    ACM Trans. Design Autom. Electr. Syst., 2000, v:5, n:3, pp:492-509 [Journal]
  27. Michel Auguin, L. Capella, F. Cuesta, Emmanuel Gresset
    Partitionnement de spécifications flots de données conditionnels pour la conception de systèmes embarqués. [Citation Graph (0, 0)][DBLP]
    Technique et Science Informatiques, 2002, v:21, n:2, pp:225-251 [Journal]
  28. Karim Ben Chehida, Michel Auguin, Sebastien Raimbault
    Partitionnement logiciel matériel ciblant une architecture reconfigurable dynamiquement. [Citation Graph (0, 0)][DBLP]
    Technique et Science Informatiques, 2003, v:22, n:6, pp:737-757 [Journal]
  29. Jean-Philippe Diguet, Guy Gogniat, Jean Luc Philippe, Yannick Le Moullec, Sebastien Bilavarn, Christian Gamrat, Karim Ben Chehida, Michel Auguin, Xavier Fornari, Philippe Kajfasz
    EPICURE: A partitioning and co-design framework for reconfigurable computing. [Citation Graph (0, 0)][DBLP]
    Microprocessors and Microsystems, 2006, v:30, n:6, pp:367-387 [Journal]
  30. Hanene Ben Fradj, Cécile Belleudy, Michel Auguin
    Main Memory Energy Optimization for Multi-Task Applications. [Citation Graph (0, 0)][DBLP]
    VLSI-SoC, 2006, pp:278-283 [Conf]

  31. Embedded Multicore Implementation of a H.264 Decoder with Power Management Considerations. [Citation Graph (, )][DBLP]


  32. Weight Bound Limits in Supertasking Approach for Guaranteed Timeline Constraints. [Citation Graph (, )][DBLP]


  33. Assertive Dynamic Power Management (AsDPM) Strategy for Globally Scheduled RT Multiprocessor Systems. [Citation Graph (, )][DBLP]


  34. Component Labeling on SIMD-SPMD Architecture. [Citation Graph (, )][DBLP]


  35. Analytical Model for Energy Consumption Analysis in Grid Based Wireless Sensor Networks. [Citation Graph (, )][DBLP]


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