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Dietmar Fey: [Publications] [Author Rank by year] [Co-authors] [Prefers] [Cites] [Cited by]

Publications of Author

  1. Dietmar Fey, Daniel Schmidt
    Marching Pixels: A new Organic Computing Prinicple for Smart CMOS Camera Chips. [Citation Graph (0, 0)][DBLP]
    ARCS Workshops, 2005, pp:123-130 [Conf]
  2. Dietmar Fey, Daniel Schmidt, Andreas Loos
    Reconfigurable OPTO-ASICs as base for future self-organizing CMOS cameras. [Citation Graph (0, 0)][DBLP]
    ARCS Workshops, 2004, pp:297-304 [Conf]
  3. Dietmar Fey, Konrad Zürl, A. Hetzner
    Architekturkonzepte für massiv-parallele, opto-elektronische Rechnersysteme. [Citation Graph (0, 0)][DBLP]
    ARCS, 1992, pp:165-176 [Conf]
  4. B. Kasche, Dietmar Fey, T. Höhn, Werner Erhard
    Massively Parallel Volume Rendering by Exploiting a 3d Optoelectronic Arithmetic Logical Unit. [Citation Graph (0, 0)][DBLP]
    ARCS, 1999, pp:189-200 [Conf]
  5. Dietmar Fey, Daniel Schmidt
    Marching-pixels: a new organic computing paradigm for smart sensor processor arrays. [Citation Graph (0, 0)][DBLP]
    Conf. Computing Frontiers, 2005, pp:1-9 [Conf]
  6. Dietmar Fey
    Transformation of a 2-D VLSI Systolic Adder Circuit in 3-D Circuits Using Optical Interconnections. [Citation Graph (0, 0)][DBLP]
    Euro-Par, Vol. II, 1996, pp:478-485 [Conf]
  7. B. Kasche, Dietmar Fey, T. Höhn, Werner Erhard
    3D Optoelectronic Fix Point Unit and Its Advantages Processing 3D Data. [Citation Graph (0, 0)][DBLP]
    Euro-Par, 1999, pp:1005-1012 [Conf]
  8. Frank Schurz, Dietmar Fey, Dmitri Berkov
    Parallelization of Simulations for Various Magnetic System Models on Small-Sized Cluster Computers with MPI. [Citation Graph (0, 0)][DBLP]
    ICCSA (5), 2006, pp:129-138 [Conf]
  9. Clemens Beckstein, Peter Dittrich, Christian Erfurth, Dietmar Fey, Birgitta König-Ries, Martin Mundhenk, Harald Sack
    SOGOS - A Distributed Meta Level Architecture for the Self-Organizing Grid of Services. [Citation Graph (0, 0)][DBLP]
    MDM, 2006, pp:82- [Conf]
  10. Dietmar Fey, Lutz Hoppe, Andreas Loos
    Reconfigurable On-Chip SIMD Processor Architectures for Intelligent CMOS Camera Chips. [Citation Graph (0, 0)][DBLP]
    PARELEC, 2004, pp:251-255 [Conf]
  11. Christian Kauhaus, Dietmar Fey
    Building Mini-Grid Environments with Virtual Private Networks: A Pragmatic Approach. [Citation Graph (0, 0)][DBLP]
    PARELEC, 2006, pp:111-115 [Conf]
  12. Marcus Komann, Dietmar Fey
    Marching Pixels - Using Organic Computing Principles in Embedded Parallel Hardware. [Citation Graph (0, 0)][DBLP]
    PARELEC, 2006, pp:369-373 [Conf]
  13. Michael Schmidt, Andreas Loos, Dietmar Fey
    A Space-Time Multiplex Architecture for 3D Stacked Embedded Vision Systems. [Citation Graph (0, 0)][DBLP]
    PARELEC, 2006, pp:374-379 [Conf]
  14. Dietmar Fey, Marcus Komann, Christian Kauhaus
    A Framework for Optimising Parameter Studies on a Cluster Computer by the Example of Micro-system Design. [Citation Graph (0, 0)][DBLP]
    PVM/MPI, 2004, pp:436-441 [Conf]
  15. Marcus Komann, Christian Kauhaus, Dietmar Fey
    Calculation of Single-File Diffusion Using Grid-Enabled Parallel Generic Cellular Automata Simulation. [Citation Graph (0, 0)][DBLP]
    PVM/MPI, 2005, pp:528-535 [Conf]
  16. Klaus D. Maier, Clemens Beckstein, Reinhard Blickhan, Dietmar Fey, Werner Erhard
    A digital multi-layer-perceptron hardware architecture based on three dimensional massively parallel optoelectronic circuits. [Citation Graph (0, 0)][DBLP]
    Informatica (Slovenia), 2001, v:25, n:2, pp:- [Journal]
  17. Dietmar Fey, Marko Degenkolb
    Digit Pipelined Arithmetic for 3-D Massively Parallel Optoelectronic Circuits. [Citation Graph (0, 0)][DBLP]
    The Journal of Supercomputing, 2000, v:16, n:3, pp:177-196 [Journal]
  18. Dietmar Fey, Marcus Komann, Frank Schurz, Andreas Loos
    An Organic Computing architecture for visual microprocessors based on Marching Pixels. [Citation Graph (0, 0)][DBLP]
    ISCAS, 2007, pp:2686-2689 [Conf]
  19. Marcus Komann, Andreas Mainka, Dietmar Fey
    Comparison of Evolving Uniform, Non-uniform Cellular Automaton, and Genetic Programming for Centroid Detection with Hardware Agents. [Citation Graph (0, 0)][DBLP]
    PaCT, 2007, pp:432-441 [Conf]
  20. Wolfgang Schnerring, Christian Kauhaus, Dietmar Fey
    A Virtual Test Environment for MPI Development: Quick Answers to Many Small Questions. [Citation Graph (0, 0)][DBLP]
    PVM/MPI, 2007, pp:73-80 [Conf]

  21. Dynamically Programmable Image Processor for Compact Vision Systems. [Citation Graph (, )][DBLP]


  22. Emergent algorithms for centroid and orientation detection in high-performance embedded cameras. [Citation Graph (, )][DBLP]


  23. Distributed vision with smart pixels. [Citation Graph (, )][DBLP]


  24. On the Effectiveness of Evolution Compared to Time-Consuming Full Search of Optimal 6-State Automata. [Citation Graph (, )][DBLP]


  25. Revising the Trade-off between the Number of Agents and Agent Intelligence. [Citation Graph (, )][DBLP]


  26. Evaluating the evolvability of emergent agents with different numbers of states. [Citation Graph (, )][DBLP]


  27. Herausforderungen der Technischen Informatik beim Unkonventionellen Rechnen. [Citation Graph (, )][DBLP]


  28. Pollarder: An Architecture Concept for Self-adapting Parallel Applications in Computational Science. [Citation Graph (, )][DBLP]


  29. A Profitability Heuristic that Reduces the Parameter Dependence of Dynamic Load Balancing. [Citation Graph (, )][DBLP]


  30. Model-Driven Design and Organic Computing -- Two Different but Possibly Accordable Concepts for the Design of Embedded Systems. [Citation Graph (, )][DBLP]


  31. Principles for Optoelectronic 3D Architectures and Correponding Algorithms to Calculate Standard Functions. [Citation Graph (, )][DBLP]


  32. LibGeoDecomp: A Grid-Enabled Library for Geometric Decomposition Codes. [Citation Graph (, )][DBLP]


  33. Challenges of MPI over IPv6. [Citation Graph (, )][DBLP]


  34. Optical Multiplexing Techniques for Photonic Clos Networks in High Performance Computing Architectures. [Citation Graph (, )][DBLP]


  35. Nano-technology aware investigations on fault-masking techniques in the presence of high fault probabilities. [Citation Graph (, )][DBLP]


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