Emre Özer, Stuart Biles Thread Priority-Aware Random Replacement in TLBs for a High-Performance Real-Time SMT Processor. [Citation Graph (0, 0)][DBLP] Asia-Pacific Computer Systems Architecture Conference, 2007, pp:376-386 [Conf]
Way guard: a segmented counting bloom filter approach to reducing energy for set-associative caches. [Citation Graph (, )][DBLP]
Energy-Efficient Simultaneous Thread Fetch from Different Cache Levels in a Soft Real-Time SMT Processor. [Citation Graph (, )][DBLP]
Low-cost Techniques for Reducing Branch Context Pollution in a Soft Realtime Embedded Multithreaded Processor. [Citation Graph (, )][DBLP]
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