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Stefanos Kaxiras: [Publications] [Author Rank by year] [Co-authors] [Prefers] [Cites] [Cited by]

Publications of Author

  1. Georgios Keramidas, Konstantinos Aisopos, Stefanos Kaxiras
    Dynamic Dictionary-Based Data Compression for Level-1 Caches. [Citation Graph (0, 0)][DBLP]
    ARCS, 2006, pp:114-129 [Conf]
  2. Stefanos Kaxiras, Girija J. Narlikar, Alan D. Berenbaum, Zhigang Hu
    Comparing power consumption of an SMT and a CMP DSP for mobile phone workloads. [Citation Graph (0, 0)][DBLP]
    CASES, 2001, pp:211-220 [Conf]
  3. Juan M. Cebrian, Juan L. Aragón, José M. García, Stefanos Kaxiras
    Adaptive VP decay: making value predictors leakage-efficient designs for high performance processors. [Citation Graph (0, 0)][DBLP]
    Conf. Computing Frontiers, 2007, pp:113-122 [Conf]
  4. Jürgen Teich, Stefanos Kaxiras, Toomas P. Plaks, Krisztián Flautner
    Topic 18: Embedded Parallel Systems. [Citation Graph (0, 0)][DBLP]
    Euro-Par, 2006, pp:1179- [Conf]
  5. Zhigang Hu, Margaret Martonosi, Stefanos Kaxiras
    TCP: Tag Correlating Prefetchers. [Citation Graph (0, 0)][DBLP]
    HPCA, 2003, pp:317-326 [Conf]
  6. Stefanos Kaxiras, James R. Goodman
    Improving CC-NUMA Performance Using Instruction-Based Prediction. [Citation Graph (0, 0)][DBLP]
    HPCA, 1999, pp:161-0 [Conf]
  7. Stefanos Kaxiras, Cliff Young
    Coherence Communication Prediction in Shared-Memory Multiprocessors. [Citation Graph (0, 0)][DBLP]
    HPCA, 2000, pp:156-167 [Conf]
  8. Stefanos Kaxiras, James R. Goodman
    The GLOW Cache Coherence Protocol Extensions for Widely Shared Data. [Citation Graph (0, 0)][DBLP]
    International Conference on Supercomputing, 1996, pp:35-43 [Conf]
  9. Stefanos Kaxiras, Stein Gjessing, James R. Goodman
    A Study of Three Dynamic Approaches to Handle Widely Shared Data in Shared-memory Multiprocessors. [Citation Graph (0, 0)][DBLP]
    International Conference on Supercomputing, 1998, pp:457-464 [Conf]
  10. Stefanos Kaxiras, Georgios Keramidas
    IPStash: a set-associative memory approach for efficient IP-lookup. [Citation Graph (0, 0)][DBLP]
    INFOCOM, 2005, pp:992-1001 [Conf]
  11. Stefanos Kaxiras
    Kiloprocessor Extensions to SCI. [Citation Graph (0, 0)][DBLP]
    IPPS, 1996, pp:166-172 [Conf]
  12. Doug Burger, Stefanos Kaxiras, James R. Goodman
    DataScalar Architectures. [Citation Graph (0, 0)][DBLP]
    ISCA, 1997, pp:338-349 [Conf]
  13. Zhigang Hu, Margaret Martonosi, Stefanos Kaxiras
    Timekeeping in the Memory System: Predicting and Optimizing Memory Behavior. [Citation Graph (0, 0)][DBLP]
    ISCA, 2002, pp:209-220 [Conf]
  14. Stefanos Kaxiras, Zhigang Hu, Margaret Martonosi
    Cache decay: exploiting generational behavior to reduce cache leakage power. [Citation Graph (0, 0)][DBLP]
    ISCA, 2001, pp:240-251 [Conf]
  15. Zhigang Hu, Philo Juang, Phil Diodato, Stefanos Kaxiras, Kevin Skadron, Margaret Martonosi, Douglas W. Clark
    Managing leakage for transient data: decay and quasi-static 4T memory cells. [Citation Graph (0, 0)][DBLP]
    ISLPED, 2002, pp:52-55 [Conf]
  16. Stefanos Kaxiras, Polychronis Xekalakis
    4T-decay sensors: a new class of small, fast, robust, and low-power, temperature/leakage sensors. [Citation Graph (0, 0)][DBLP]
    ISLPED, 2004, pp:108-113 [Conf]
  17. Stefanos Kaxiras, Polychronis Xekalakis, Georgios Keramidas
    A simple mechanism to adapt leakage-control policies to temperature. [Citation Graph (0, 0)][DBLP]
    ISLPED, 2005, pp:54-59 [Conf]
  18. Stefanos Kaxiras, Georgios Keramidas
    IPStash: a Power-Efficient Memory Architecture for IP-lookup. [Citation Graph (0, 0)][DBLP]
    MICRO, 2003, pp:361-372 [Conf]
  19. Stefanos Kaxiras, Zhigang Hu, Girija J. Narlikar, Rae McLellan
    Cache-Line Decay: A Mechanism to Reduce Cache Leakage Power. [Citation Graph (0, 0)][DBLP]
    PACS, 2000, pp:82-96 [Conf]
  20. Georgios Keramidas, Pavlos Petoumenos, Stefanos Kaxiras, Alexandros Antonopoulos, Dimitrios N. Serpanos
    Preventing Denial-of-Service Attacks in Shared CMP Caches. [Citation Graph (0, 0)][DBLP]
    SAMOS, 2006, pp:359-372 [Conf]
  21. Philo Juang, Phil Diodato, Stefanos Kaxiras, Kevin Skadron, Zhigang Hu, Margaret Martonosi, Douglas W. Clark
    Implementing Decay Techniques using 4T Quasi-Static Memory Cells. [Citation Graph (0, 0)][DBLP]
    Computer Architecture Letters, 2002, v:1, n:, pp:- [Journal]
  22. Philo Juang, Kevin Skadron, Margaret Martonosi, Zhigang Hu, Douglas W. Clark, Phil Diodato, Stefanos Kaxiras
    Implementing branch-predictor decay using quasi-static memory cells. [Citation Graph (0, 0)][DBLP]
    TACO, 2004, v:1, n:2, pp:180-219 [Journal]
  23. Zhigang Hu, Stefanos Kaxiras, Margaret Martonosi
    Let caches decay: reducing leakage energy via exploitation of cache generational behavior. [Citation Graph (0, 0)][DBLP]
    ACM Trans. Comput. Syst., 2002, v:20, n:2, pp:161-190 [Journal]
  24. Georgios Keramidas, Polychronis Xekalakis, Stefanos Kaxiras
    Applying Decay to Reduce Dynamic Power in Set-Associative Caches. [Citation Graph (0, 0)][DBLP]
    HiPEAC, 2007, pp:38-53 [Conf]
  25. Pavlos Petoumenos, Georgios Keramidas, Håkan Zeffer, Stefanos Kaxiras, Erik Hagersten
    Modeling Cache Sharing on Chip Multiprocessor Architectures. [Citation Graph (0, 0)][DBLP]
    IISWC, 2006, pp:160-171 [Conf]

  26. MLP-Aware Instruction Queue Resizing: The Key to Power-Efficient Performance. [Citation Graph (, )][DBLP]


  27. Where replacement algorithms fail: a thorough analysis. [Citation Graph (, )][DBLP]


  28. Low power microarchitecture with instruction reuse. [Citation Graph (, )][DBLP]


  29. Interval-based models for run-time DVFS orchestration in superscalar processors. [Citation Graph (, )][DBLP]


  30. Instruction Precomputation for Fault Detection. [Citation Graph (, )][DBLP]


  31. Cache replacement based on reuse-distance prediction. [Citation Graph (, )][DBLP]


  32. Efficient microarchitecture policies for accurately adapting to power constraints. [Citation Graph (, )][DBLP]


  33. Instruction-based reuse-distance prediction for effective cache management. [Citation Graph (, )][DBLP]


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