|
Search the dblp DataBase
Dirk Koch:
[Publications]
[Author Rank by year]
[Co-authors]
[Prefers]
[Cites]
[Cited by]
Publications of Author
- Dirk Koch, Thilo Streichert, Steffen Dittrich, Christian Strengert, Christian Haubelt, Jürgen Teich
An Operating System Infrastructure for Fault-Tolerant Reconfigurable Networks. [Citation Graph (0, 0)][DBLP] ARCS, 2006, pp:202-216 [Conf]
- Dmitrij Kissler, Alexey Kupriyanov, Frank Hannig, Dirk Koch, Jürgen Teich
A Generic Framework for Rapid Prototyping of System-on-Chip Designs. [Citation Graph (0, 0)][DBLP] CDES, 2006, pp:189-195 [Conf]
- Dirk Koch, Jürgen Teich
Platform-independent methodology for partial reconfiguration. [Citation Graph (0, 0)][DBLP] Conf. Computing Frontiers, 2004, pp:398-403 [Conf]
- Dirk Koch, Matthiaas Koerber, Jürgen Teich
Searching RC5-Keys with Distributed Reconfigurable Computing. [Citation Graph (0, 0)][DBLP] ERSA, 2006, pp:42-48 [Conf]
- Dirk Koch, Christian Haubelt, Jürgen Teich
Efficient hardware checkpointing: concepts, overhead analysis, and implementation. [Citation Graph (0, 0)][DBLP] FPGA, 2007, pp:188-196 [Conf]
- Christophe Bobda, Mateusz Majer, Dirk Koch, Ali Ahmadinia, Jürgen Teich
A Dynamic NoC Approach for Communication in Reconfigurable Devices. [Citation Graph (0, 0)][DBLP] FPL, 2004, pp:1032-1036 [Conf]
- Dirk Koch
Preemptive Hardware Task Management. [Citation Graph (0, 0)][DBLP] FPL, 2004, pp:1174- [Conf]
- Christian Haubelt, Dirk Koch, Jürgen Teich
Basic OS Support for Distributed Reconfigurable Hardware. [Citation Graph (0, 0)][DBLP] SAMOS, 2004, pp:30-38 [Conf]
- Ali Ahmadinia, Christophe Bobda, Dirk Koch, Mateusz Majer, Jürgen Teich
Task scheduling for heterogeneous reconfigurable computers. [Citation Graph (0, 0)][DBLP] SBCCI, 2004, pp:22-27 [Conf]
- Christian Haubelt, Dirk Koch, Jürgen Teich
ReCoNet: Modeling and Implementation of Fault Tolerant Distributed Reconfigurable Hardware. [Citation Graph (0, 0)][DBLP] SBCCI, 2003, pp:343-348 [Conf]
- Dirk Koch, Christian Haubelt, Thilo Streichert, Jürgen Teich
Modeling and Synthesis of Hardware-Software Morphing. [Citation Graph (0, 0)][DBLP] ISCAS, 2007, pp:2746-2749 [Conf]
Dynamic Reconfiguration of FlexRay Schedules for Response Time Reduction in Asynchronous Fault-Tolerant Networks. [Citation Graph (, )][DBLP]
Efficient Reconfigurable On-Chip Buses for FPGAs. [Citation Graph (, )][DBLP]
Minimizing Internal Fragmentation by Fine-Grained Two-Dimensional Module Placement for Runtime Reconfiguralble Systems. [Citation Graph (, )][DBLP]
A communication architecture for complex runtime reconfigurable systems and its implementation on spartan-3 FPGAs. [Citation Graph (, )][DBLP]
No-break dynamic defragmentation of reconfigurable devices. [Citation Graph (, )][DBLP]
ReCoBus-Builder - A novel tool and technique to build statically and dynamically reconfigurable systems for FPGAS. [Citation Graph (, )][DBLP]
Photo-realistic Rendering of Metallic Car Paint from Image-Based Measurements. [Citation Graph (, )][DBLP]
Search in 0.002secs, Finished in 0.002secs
|