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Christian Haubelt: [Publications] [Author Rank by year] [Co-authors] [Prefers] [Cites] [Cited by]

Publications of Author

  1. Dirk Koch, Thilo Streichert, Steffen Dittrich, Christian Strengert, Christian Haubelt, Jürgen Teich
    An Operating System Infrastructure for Fault-Tolerant Reconfigurable Networks. [Citation Graph (0, 0)][DBLP]
    ARCS, 2006, pp:202-216 [Conf]
  2. Thomas Schlichter, Christian Haubelt, Frank Hannig, Jürgen Teich
    Using Symbolic Feasibility Tests during Design Space Exploration of Heterogeneous Multi-Processor Systems. [Citation Graph (0, 0)][DBLP]
    ASAP, 2005, pp:9-14 [Conf]
  3. Christian Haubelt, Stephan Otto, Cornelia Grabbe, Jürgen Teich
    A system-level approach to hardware reconfigurable systems. [Citation Graph (0, 0)][DBLP]
    ASP-DAC, 2005, pp:298-301 [Conf]
  4. Thilo Streichert, Christian Haubelt, Jürgen Teich
    Online hardware/software partitioning in networked embedded systems. [Citation Graph (0, 0)][DBLP]
    ASP-DAC, 2005, pp:982-985 [Conf]
  5. Christian Haubelt, Jürgen Teich, Rainer Feldmann, Burkhard Monien
    SAT-Based Techniques in System Synthesis. [Citation Graph (0, 0)][DBLP]
    DATE, 2003, pp:11168-11169 [Conf]
  6. Christian Haubelt, Jürgen Teich, Kai Richter, Rolf Ernst
    System Design for Flexibility. [Citation Graph (0, 0)][DBLP]
    DATE, 2002, pp:854-861 [Conf]
  7. Thilo Streichert, Christian Haubelt, Jürgen Teich
    Distributed HW/SW-Partitioning for Embedded Reconfigurable Networks. [Citation Graph (0, 0)][DBLP]
    DATE, 2005, pp:894-895 [Conf]
  8. M. Streubühr, J. Falk, Christian Haubelt, Jürgen Teich, Rainer Dorsch, Thomas Schlipf
    Task-accurate performance modeling in SystemC for real-time multi-processor architectures. [Citation Graph (0, 0)][DBLP]
    DATE, 2006, pp:480-481 [Conf]
  9. Christian Haubelt, Jürgen Gamenik, Jürgen Teich
    Initial Population Construction for Convergence Improvement of MOEAs. [Citation Graph (0, 0)][DBLP]
    EMO, 2005, pp:191-205 [Conf]
  10. Christian Haubelt, Sanaz Mostaghim, Jürgen Teich, Ambrish Tyagi
    Solving Hierarchical Optimization Problems Using MOEAs. [Citation Graph (0, 0)][DBLP]
    EMO, 2003, pp:162-176 [Conf]
  11. Martin Lukasiewycz, Michael Glaß, Christian Haubelt, Jürgen Teich
    Symbolic Archive Representation for a Fast Nondominance Test. [Citation Graph (0, 0)][DBLP]
    EMO, 2006, pp:111-125 [Conf]
  12. Dirk Koch, Christian Haubelt, Jürgen Teich
    Efficient hardware checkpointing: concepts, overhead analysis, and implementation. [Citation Graph (0, 0)][DBLP]
    FPGA, 2007, pp:188-196 [Conf]
  13. Rainer Feldmann, Christian Haubelt, Burkhard Monien, Jürgen Teich
    Fault Tolerances Analysis of Distributed Reconfigurable Systems Using SAT-Based Techniques. [Citation Graph (0, 0)][DBLP]
    FPL, 2003, pp:478-487 [Conf]
  14. Christian Haubelt
    Design Space Exploration for Distributed Hardware Reconfigurable Systems. [Citation Graph (0, 0)][DBLP]
    FPL, 2004, pp:1171- [Conf]
  15. Thomas Schlichter, Christian Haubelt, Jürgen Teich
    Improving EA-based design space exploration by utilizing symbolic feasibility tests. [Citation Graph (0, 0)][DBLP]
    GECCO, 2005, pp:1945-1952 [Conf]
  16. Christian Haubelt, Marek Jersak, Kai Richter, Karsten Strehl, Dirk Ziegenbein, Rolf Ernst, Jürgen Teich, Lothar Thiele
    SPI-Workbench - Modellierung, Analyse und Optimierung eingebetteter Systeme. [Citation Graph (0, 0)][DBLP]
    GI Jahrestagung (2), 2005, pp:693-697 [Conf]
  17. Grygoriy Bunin, Axel Schneider, Christian Haubelt, Jan Langer, Ulrich Heinkel
    Automatic Test Case Generation with NuSMV. [Citation Graph (0, 0)][DBLP]
    GI Jahrestagung (2), 2006, pp:262-263 [Conf]
  18. Thomas Schlichter, Martin Lukasiewycz, Christian Haubelt, Jürgen Teich
    Improving System Level Design Space Exploration by Incorporating SAT-Solvers into Multi-Objective Evolutionary Algorithms. [Citation Graph (0, 0)][DBLP]
    ISVLSI, 2006, pp:309-316 [Conf]
  19. Christian Haubelt, Dirk Koch, Jürgen Teich
    Basic OS Support for Distributed Reconfigurable Hardware. [Citation Graph (0, 0)][DBLP]
    SAMOS, 2004, pp:30-38 [Conf]
  20. Christian Haubelt, Jürgen Teich, Kai Richter, Rolf Ernst
    Flexibility/Cost-Tradeoffs of Platform-Based Systems. [Citation Graph (0, 0)][DBLP]
    Embedded Processor Design Challenges, 2002, pp:38-56 [Conf]
  21. Thilo Streichert, Christian Strengert, Christian Haubelt, Jürgen Teich
    Dynamic task binding for hardware/software reconfigurable networks. [Citation Graph (0, 0)][DBLP]
    SBCCI, 2006, pp:38-43 [Conf]
  22. Christian Haubelt, Dirk Koch, Jürgen Teich
    ReCoNet: Modeling and Implementation of Fault Tolerant Distributed Reconfigurable Hardware. [Citation Graph (0, 0)][DBLP]
    SBCCI, 2003, pp:343-348 [Conf]
  23. Michael Glaß, Martin Lukasiewycz, Thilo Streichert, Christian Haubelt, Jürgen Teich
    Interactive presentation: Reliability-aware system synthesis. [Citation Graph (0, 0)][DBLP]
    DATE, 2007, pp:409-414 [Conf]
  24. Dirk Koch, Christian Haubelt, Thilo Streichert, Jürgen Teich
    Modeling and Synthesis of Hardware-Software Morphing. [Citation Graph (0, 0)][DBLP]
    ISCAS, 2007, pp:2746-2749 [Conf]
  25. Bernhard Niemann, Christian Haubelt
    Towards a Unified Execution Model for Transactions in TLM. [Citation Graph (0, 0)][DBLP]
    MEMOCODE, 2007, pp:103-112 [Conf]
  26. Joachim Keinert, Christian Haubelt, Jürgen Teich
    Simulative Buffer Analysis of Local Image Processing Algorithms Described by Windowed Synchronous Data Flow. [Citation Graph (0, 0)][DBLP]
    ICSAMOS, 2007, pp:161-168 [Conf]
  27. Thilo Streichert, Christian Haubelt, Jürgen Teich
    Multi-Objective Topology Optimization for Networked Embedded Systems. [Citation Graph (0, 0)][DBLP]
    ICSAMOS, 2006, pp:93-98 [Conf]
  28. Martin Lukasiewycz, Michael Glaß, Christian Haubelt, Jürgen Teich
    Solving Multi-objective Pseudo-Boolean Problems. [Citation Graph (0, 0)][DBLP]
    SAT, 2007, pp:56-69 [Conf]
  29. S. Helwig, Christian Haubelt, Jürgen Teich
    Modeling and analysis of indirect communication in particle swarm optimization. [Citation Graph (0, 0)][DBLP]
    Congress on Evolutionary Computation, 2005, pp:1246-1253 [Conf]
  30. Florian Dittmann, Franz-Josef Rammig, M. Streubühr, Christian Haubelt, Andreas Schallenberg, Wolfgang Nebel
    Exploration, Partitioning and Simulation of Reconfigurable Systems (Exploration, Partitionierung und Simulation rekonfigurierbarer Systeme). [Citation Graph (0, 0)][DBLP]
    it - Information Technology, 2007, v:49, n:3, pp:149-0 [Journal]
  31. Thilo Streichert, Michael Glaß, Christian Haubelt, Jürgen Teich
    Design space exploration of reliable networked embedded systems. [Citation Graph (0, 0)][DBLP]
    Journal of Systems Architecture, 2007, v:53, n:10, pp:751-763 [Journal]

  32. Dynamic Reconfiguration of FlexRay Schedules for Response Time Reduction in Asynchronous Fault-Tolerant Networks. [Citation Graph (, )][DBLP]


  33. Topology-Aware Replica Placement in Fault-Tolerant Embedded Networks. [Citation Graph (, )][DBLP]


  34. Synthesis of Multi-dimensional High-Speed FIFOs for Out-of-Order Communication. [Citation Graph (, )][DBLP]


  35. Efficient symbolic multi-objective design space exploration. [Citation Graph (, )][DBLP]


  36. Symbolic voter placement for dependability-aware system synthesis. [Citation Graph (, )][DBLP]


  37. SystemCoDesigner: automatic design space exploration and rapid prototyping from behavioral models. [Citation Graph (, )][DBLP]


  38. Concurrent topology and routing optimization in automotive network integration. [Citation Graph (, )][DBLP]


  39. Towards scalable system-level reliability analysis. [Citation Graph (, )][DBLP]


  40. Symbolic Reliability Analysis and Optimization of ECU Networks. [Citation Graph (, )][DBLP]


  41. Incorporating graceful degradation into embedded system design. [Citation Graph (, )][DBLP]


  42. Combined system synthesis and communication architecture exploration for MPSoCs. [Citation Graph (, )][DBLP]


  43. Model-based synthesis and optimization of static multi-rate image processing algorithms. [Citation Graph (, )][DBLP]


  44. Efficient High-Level modeling in the networking domain. [Citation Graph (, )][DBLP]


  45. A generalized static data flow clustering algorithm for mpsoc scheduling of multimedia applications. [Citation Graph (, )][DBLP]


  46. Actor-Oriented Modeling and Simulation of Sliding Window Image Processing Algorithms. [Citation Graph (, )][DBLP]


  47. Efficient Reconfigurable On-Chip Buses for FPGAs. [Citation Graph (, )][DBLP]


  48. Classification of General Data Flow Actors into Known Models of Computation. [Citation Graph (, )][DBLP]


  49. Symbolic Reliability Analysis of Self-healing Networked Embedded Systems. [Citation Graph (, )][DBLP]


  50. Multi-objective routing and topology optimization in networked embedded systems. [Citation Graph (, )][DBLP]


  51. SAT-decoding in evolutionary algorithms for discrete constrained optimization problems. [Citation Graph (, )][DBLP]


  52. A feasibility-preserving local search operator for constrained discrete optimization problems. [Citation Graph (, )][DBLP]


  53. Symbolic Quasi-Static Scheduling of Actor-Oriented SystemC Models. [Citation Graph (, )][DBLP]


  54. Mapping Actor-Oriented Models to TLM Architectures. [Citation Graph (, )][DBLP]


  55. Formalizing TLM with Communicating State Machines. [Citation Graph (, )][DBLP]


  56. Efficient Representation and Simulation of Model-Based Designs. [Citation Graph (, )][DBLP]


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