The SCEAS System
Navigation Menu

Search the dblp DataBase

Title:
Author:

René Schüffny: [Publications] [Author Rank by year] [Co-authors] [Prefers] [Cites] [Cited by]

Publications of Author

  1. Jörg Schreiter, Ulrich Ramacher, Arne Heittmann, Daniel Matolin, René Schüffny
    Pulse coupled neural networks with adaptive synapses for image segmentation. [Citation Graph (0, 0)][DBLP]
    ARCS Workshops, 2004, pp:275-282 [Conf]
  2. Martin Franz, René Schüffny
    Segmentation of Blood Vessels in Subtraction Angiographic Images. [Citation Graph (0, 0)][DBLP]
    DICTA, 2003, pp:215-224 [Conf]
  3. Stephan Henker, Jens-Uwe Schluessler, René Schüffny
    Concept of Color Correction on Multi-Channel CMOS Sensors. [Citation Graph (0, 0)][DBLP]
    DICTA, 2003, pp:771-780 [Conf]
  4. Martin Franz, René Schüffny
    An Architectural Study of a Massively Parallel Processor for Convolution-Type Operations in Complex Vision Tasks. [Citation Graph (0, 0)][DBLP]
    ICANN, 1996, pp:377-382 [Conf]
  5. Arne Heittmann, Ulrich Ramacher, Daniel Matolin, Jörg Schreiter, René Schüffny
    An Analog VLSI Pulsed Neural Network for Image Segmentation Using Adaptive Connection Weights. [Citation Graph (0, 0)][DBLP]
    ICANN, 2002, pp:1293-1298 [Conf]
  6. Joerg Krupar, R. Srowik, Jörg Schreiter, Achim Graupner, René Schüffny, U. Jorges
    Minimizing charge injection errors in high-precision, high-speed SC-circuits. [Citation Graph (0, 0)][DBLP]
    ISCAS (1), 2001, pp:727-730 [Conf]
  7. Stefan Getzlaff, Jörg Schreiter, Achim Graupner, René Schüffny
    A system-on-chip realization of a CMOS image sensor with programmable analog image preprocessing. [Citation Graph (0, 0)][DBLP]
    ISCAS (4), 2001, pp:486-489 [Conf]
  8. M. Schwarzenberg, M. Traber, M. Scholles, René Schüffny
    A VLSI chip for wavelet image compression. [Citation Graph (0, 0)][DBLP]
    ISCAS (4), 1999, pp:271-274 [Conf]
  9. Daniel Matolin, Jörg Schreiter, Stefan Getzlaff, René Schüffny
    An Analog VLSI Pulsed Neural Network Implementation for Image Segmentation. [Citation Graph (0, 0)][DBLP]
    PARELEC, 2004, pp:51-55 [Conf]
  10. Achim Graupner, Stefan Getzlaff, Jörg Schreiter, René Schüffny
    A vision device for image processing. [Citation Graph (0, 0)][DBLP]
    SIP, 2001, pp:78-83 [Conf]
  11. Markus Rullmann, Jens-Uwe Schluessler, René Schüffny
    On-chip digital noise reduction for integrated CMOS Cameras. [Citation Graph (0, 0)][DBLP]
    VCIP, 2003, pp:1620-1629 [Conf]

  12. Neighborhood Rank Order Coding for Robust Texture Analysis and Feature Extraction. [Citation Graph (, )][DBLP]


  13. BCM and Membrane Potential: Alternative Ways to Timing Dependent Plasticity. [Citation Graph (, )][DBLP]


  14. Design of parallel preprocessing image sensors. [Citation Graph (, )][DBLP]


  15. CMOS image sensor with shared in-pixel amplifier and calibration facility. [Citation Graph (, )][DBLP]


Search in 0.069secs, Finished in 0.070secs
NOTICE1
System may not be available sometimes or not working properly, since it is still in development with continuous upgrades
NOTICE2
The rankings that are presented on this page should NOT be considered as formal since the citation info is incomplete in DBLP
 
System created by asidirop@csd.auth.gr [http://users.auth.gr/~asidirop/] © 2002
for Data Engineering Laboratory, Department of Informatics, Aristotle University © 2002