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René Schüffny :
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Jörg Schreiter , Ulrich Ramacher , Arne Heittmann , Daniel Matolin , René Schüffny Pulse coupled neural networks with adaptive synapses for image segmentation. [Citation Graph (0, 0)][DBLP ] ARCS Workshops, 2004, pp:275-282 [Conf ] Martin Franz , René Schüffny Segmentation of Blood Vessels in Subtraction Angiographic Images. [Citation Graph (0, 0)][DBLP ] DICTA, 2003, pp:215-224 [Conf ] Stephan Henker , Jens-Uwe Schluessler , René Schüffny Concept of Color Correction on Multi-Channel CMOS Sensors. [Citation Graph (0, 0)][DBLP ] DICTA, 2003, pp:771-780 [Conf ] Martin Franz , René Schüffny An Architectural Study of a Massively Parallel Processor for Convolution-Type Operations in Complex Vision Tasks. [Citation Graph (0, 0)][DBLP ] ICANN, 1996, pp:377-382 [Conf ] Arne Heittmann , Ulrich Ramacher , Daniel Matolin , Jörg Schreiter , René Schüffny An Analog VLSI Pulsed Neural Network for Image Segmentation Using Adaptive Connection Weights. [Citation Graph (0, 0)][DBLP ] ICANN, 2002, pp:1293-1298 [Conf ] Joerg Krupar , R. Srowik , Jörg Schreiter , Achim Graupner , René Schüffny , U. Jorges Minimizing charge injection errors in high-precision, high-speed SC-circuits. [Citation Graph (0, 0)][DBLP ] ISCAS (1), 2001, pp:727-730 [Conf ] Stefan Getzlaff , Jörg Schreiter , Achim Graupner , René Schüffny A system-on-chip realization of a CMOS image sensor with programmable analog image preprocessing. [Citation Graph (0, 0)][DBLP ] ISCAS (4), 2001, pp:486-489 [Conf ] M. Schwarzenberg , M. Traber , M. Scholles , René Schüffny A VLSI chip for wavelet image compression. [Citation Graph (0, 0)][DBLP ] ISCAS (4), 1999, pp:271-274 [Conf ] Daniel Matolin , Jörg Schreiter , Stefan Getzlaff , René Schüffny An Analog VLSI Pulsed Neural Network Implementation for Image Segmentation. [Citation Graph (0, 0)][DBLP ] PARELEC, 2004, pp:51-55 [Conf ] Achim Graupner , Stefan Getzlaff , Jörg Schreiter , René Schüffny A vision device for image processing. [Citation Graph (0, 0)][DBLP ] SIP, 2001, pp:78-83 [Conf ] Markus Rullmann , Jens-Uwe Schluessler , René Schüffny On-chip digital noise reduction for integrated CMOS Cameras. [Citation Graph (0, 0)][DBLP ] VCIP, 2003, pp:1620-1629 [Conf ] Neighborhood Rank Order Coding for Robust Texture Analysis and Feature Extraction. [Citation Graph (, )][DBLP ] BCM and Membrane Potential: Alternative Ways to Timing Dependent Plasticity. [Citation Graph (, )][DBLP ] Design of parallel preprocessing image sensors. [Citation Graph (, )][DBLP ] CMOS image sensor with shared in-pixel amplifier and calibration facility. [Citation Graph (, )][DBLP ] Search in 0.001secs, Finished in 0.002secs