The SCEAS System
Navigation Menu
Introduction
Collection Based
Clustering
Ranking
Paper Based
Journals
Conferences
DB Status
Statistics
Search

Search the dblp DataBase

Title:
Author:
Diederik Verkest: [Publications] [Author Rank by year] [Co-authors] [Prefers] [Cites] [Cited by]

Publications of Author

  1. Praveen Raghavan, Satyakiran Munaga, Estela Rey Ramos, Andy Lambrechts, Murali Jayapala, Francky Catthoor, Diederik Verkest
    A Customized Cross-Bar for Data-Shuffling in Domain-Specific SIMD Processors. [Citation Graph (0, 0)][DBLP]
    ARCS, 2007, pp:57-68 [Conf]
  2. Andy Lambrechts, Praveen Raghavan, Anthony Leroy, Guillermo Talavera, Tom Vander Aa, Murali Jayapala, Francky Catthoor, Diederik Verkest, Geert Deconinck, Henk Corporaal, Frédéric Robert, Jordi Carrabina
    Power Breakdown Analysis for a Heterogeneous NoC Platform Running a Video Application. [Citation Graph (0, 0)][DBLP]
    ASAP, 2005, pp:179-184 [Conf]
  3. Peng Yang, Dirk Desmet, Francky Catthoor, Diederik Verkest
    Dynamic scheduling of concurrent tasks with cost performance trade-off. [Citation Graph (0, 0)][DBLP]
    CASES, 2000, pp:103-109 [Conf]
  4. Dirk Desmet, Michiel Esvelt, Prabhat Avasare, Diederik Verkest, Hugo De Man
    Timed executable system specification of an ADSL modem using a C++ based design environment: a case study. [Citation Graph (0, 0)][DBLP]
    CODES, 1999, pp:38-42 [Conf]
  5. Anthony Leroy, Paul Marchal, Adelina Shickova, Francky Catthoor, Frédéric Robert, Diederik Verkest
    Spatial division multiplexing: a novel approach for guaranteed throughput on NoCs. [Citation Graph (0, 0)][DBLP]
    CODES+ISSS, 2005, pp:81-86 [Conf]
  6. Frederik Vermeulen, Francky Catthoor, Diederik Verkest, Hugo De Man
    Extended design reuse trade-offs in hardware-software architecture mapping. [Citation Graph (0, 0)][DBLP]
    CODES, 2000, pp:103-107 [Conf]
  7. Dirk Desmet, Diederik Verkest, Hugo De Man
    Operating system based software generation for systems-on-chip. [Citation Graph (0, 0)][DBLP]
    DAC, 2000, pp:396-401 [Conf]
  8. Vincent Nollet, Théodore Marescaux, Diederik Verkest, Jean-Yves Mignolet, Serge Vernalde
    Operating-system controlled network on chip. [Citation Graph (0, 0)][DBLP]
    DAC, 2004, pp:256-259 [Conf]
  9. Julio Leao da Silva Jr., Chantal Ykman-Couvreur, Miguel Miranda, Kris Croes, Sven Wuytack, Gjalt G. de Jong, Francky Catthoor, Diederik Verkest, Paul Six, Hugo De Man
    Efficient System Exploration and Synthesis of Applications with Dynamic Data Storage and Intensive Data Transfer. [Citation Graph (0, 0)][DBLP]
    DAC, 1998, pp:76-81 [Conf]
  10. Arnout Vandecappelle, Miguel Miranda, Erik Brockmeyer, Francky Catthoor, Diederik Verkest
    Global Multimedia System Design Exploration Using Accurate Memory Organization Feedback. [Citation Graph (0, 0)][DBLP]
    DAC, 1999, pp:327-332 [Conf]
  11. Chantal Ykman-Couvreur, J. Lambrecht, Diederik Verkest, Francky Catthoor, Aristides Nikologiannis, George E. Konstantoulakis
    System-level performance optimization of the data queueing memory management in high-speed network processors. [Citation Graph (0, 0)][DBLP]
    DAC, 2002, pp:518-523 [Conf]
  12. Steve Guccione, Diederik Verkest, Ivo Bolsens
    Design Technology for Networked Reconfigurable FPGA Platforms. [Citation Graph (0, 0)][DBLP]
    DATE, 2002, pp:994-999 [Conf]
  13. Bingfeng Mei, Serge Vernalde, Diederik Verkest, Rudy Lauwereins
    Design Methodology for a Tightly Coupled VLIW/Reconfigurable Matrix Architecture: A Case Study. [Citation Graph (0, 0)][DBLP]
    DATE, 2004, pp:1224-1229 [Conf]
  14. Bingfeng Mei, Serge Vernalde, Diederik Verkest, Hugo De Man, Rudy Lauwereins
    Exploiting Loop-Level Parallelism on Coarse-Grained Reconfigurable Architectures Using Modulo Scheduling. [Citation Graph (0, 0)][DBLP]
    DATE, 2003, pp:10296-10301 [Conf]
  15. Jean-Yves Mignolet, Vincent Nollet, Paul Coene, Diederik Verkest, Serge Vernalde, Rudy Lauwereins
    Infrastructure for Design and Management of Relocatable Tasks in a Heterogeneous Reconfigurable System-on-Chip. [Citation Graph (0, 0)][DBLP]
    DATE, 2003, pp:10986-10993 [Conf]
  16. Vincent Nollet, Prabhat Avasare, Jean-Yves Mignolet, Diederik Verkest
    Low Cost Task Migration Initiation in a Heterogeneous MP-SoC. [Citation Graph (0, 0)][DBLP]
    DATE, 2005, pp:252-253 [Conf]
  17. Praveen Raghavan, Andy Lambrechts, Murali Jayapala, Francky Catthoor, Diederik Verkest
    Distributed loop controller architecture for multi-threading in uni-threaded VLIW processors. [Citation Graph (0, 0)][DBLP]
    DATE, 2006, pp:339-344 [Conf]
  18. Steven Vercauteren, Jan van der Steen, Diederik Verkest
    Combining Software Synthesis and Hardware/Software Interface Generation to Meet Hard Real-Time Constraints. [Citation Graph (0, 0)][DBLP]
    DATE, 1999, pp:556-561 [Conf]
  19. Steven Vercauteren, Diederik Verkest, Gjalt G. de Jong, Bill Lin
    Efficient Verification using Generalized Partial Order Analysis. [Citation Graph (0, 0)][DBLP]
    DATE, 1998, pp:782-789 [Conf]
  20. Diederik Verkest, Joachim Kunkel, Frank Schirrmeister
    System Level Design Using C++. [Citation Graph (0, 0)][DBLP]
    DATE, 2000, pp:74-0 [Conf]
  21. Frederik Vermeulen, Francky Catthoor, Hugo De Man, Diederik Verkest
    Formalized Three-Layer System-Level Reuse Model and Methodology for Embedded Data-Dominated Applications. [Citation Graph (0, 0)][DBLP]
    DATE, 2000, pp:92-98 [Conf]
  22. Chun Wong, Paul Marchal, Peng Yang, Francky Catthoor, Hugo De Man, Aggeliki Prayati, Nathalie Cossement, Rudy Lauwereins, Diederik Verkest
    Task concurrency management methodology summary. [Citation Graph (0, 0)][DBLP]
    DATE, 2001, pp:813- [Conf]
  23. Prabhat Avasare, Vincent Nollet, Jean-Yves Mignolet, Diederik Verkest, Henk Corporaal
    Centralized end-to-end flow control in a best-effort network-on-chip. [Citation Graph (0, 0)][DBLP]
    EMSOFT, 2005, pp:17-20 [Conf]
  24. Vincent Nollet, Jean-Yves Mignolet, Andrei Bartic, Diederik Verkest, Serge Vernalde, Rudy Lauwereins
    Hierarchical Run-Time Reconfiguration Managed by an Operating System for Reconfigurable Systems. [Citation Graph (0, 0)][DBLP]
    Engineering of Reconfigurable Systems and Algorithms, 2003, pp:81-87 [Conf]
  25. Vincent Nollet, Prabhat Avasare, Diederik Verkest, Henk Corporaal
    Exploiting Hierarchical Configuration to Improve Run-Time MPSoC Task Assignment. [Citation Graph (0, 0)][DBLP]
    ERSA, 2006, pp:49-55 [Conf]
  26. Javier Resano, Diederik Verkest, Daniel Mozos, Serge Vernalde, Francky Catthoor
    Run-Time Scheduling for Multimedia Applications on Dynamically Reconfigurable Systems. [Citation Graph (0, 0)][DBLP]
    ESTImedia, 2003, pp:156-162 [Conf]
  27. Richard Stahl, Francky Catthoor, Rudy Lauwereins, Diederik Verkest
    Design-Time Data-Access Analysis for Parallel Java Programs with Shared-Memory Communication Model. [Citation Graph (0, 0)][DBLP]
    Euro-Par, 2004, pp:206-213 [Conf]
  28. Javier Resano, Diederik Verkest, Daniel Mozos, Serge Vernalde, Francky Catthoor
    Application of Task Concurrency Management on Dynamically Reconfigurable Hardware Platforms. [Citation Graph (0, 0)][DBLP]
    FCCM, 2003, pp:278-279 [Conf]
  29. Andrei Bartic, Dirk Desmet, Jean-Yves Mignolet, Théodore Marescaux, Diederik Verkest, Serge Vernalde, Rudy Lauwereins, J. Miller, Frédéric Robert
    Network-on-Chip for Reconfigurable Systems: From High-Level Design Down to Implementation. [Citation Graph (0, 0)][DBLP]
    FPL, 2004, pp:637-647 [Conf]
  30. Yajun Ha, Radovan Hipik, Serge Vernalde, Diederik Verkest, Marc Engels, Rudy Lauwereins, Hugo De Man
    Adding Hardware Support to the HotSpot Virtual Machine for Domain Specific Applications. [Citation Graph (0, 0)][DBLP]
    FPL, 2002, pp:1135-1138 [Conf]
  31. Théodore Marescaux, Andrei Bartic, Diederik Verkest, Serge Vernalde, Rudy Lauwereins
    Interconnection Networks Enable Fine-Grain Dynamic Multi-tasking on FPGAs. [Citation Graph (0, 0)][DBLP]
    FPL, 2002, pp:795-805 [Conf]
  32. Théodore Marescaux, Jean-Yves Mignolet, Andrei Bartic, W. Moffat, Diederik Verkest, Serge Vernalde, Rudy Lauwereins
    Networks on Chip as Hardware Components of an OS for Reconfigurable Systems. [Citation Graph (0, 0)][DBLP]
    FPL, 2003, pp:595-605 [Conf]
  33. Bingfeng Mei, Serge Vernalde, Diederik Verkest, Hugo De Man, Rudy Lauwereins
    ADRES: An Architecture with Tightly Coupled VLIW Processor and Coarse-Grained Reconfigurable Matrix. [Citation Graph (0, 0)][DBLP]
    FPL, 2003, pp:61-70 [Conf]
  34. Javier Resano, Daniel Mozos, Diederik Verkest, Serge Vernalde, Francky Catthoor
    Run-Time Minimization of Reconfiguration Overhead in Dynamically Reconfigurable Systems. [Citation Graph (0, 0)][DBLP]
    FPL, 2003, pp:585-594 [Conf]
  35. Richard Stahl, Robert Pasko, Francky Catthoor, Rudy Lauwereins, Diederik Verkest
    High-Level Data-Access Analysis for Characterisation of (Sub)task-Level Parallelism in Java. [Citation Graph (0, 0)][DBLP]
    HIPS, 2004, pp:31-40 [Conf]
  36. Diederik Verkest, Peng Yang, Chun Wong, Paul Marchal
    Optimisation Problems for Dynamic Concurrent Task-Based Systems. [Citation Graph (0, 0)][DBLP]
    ICCAD, 2001, pp:265-0 [Conf]
  37. Aggeliki Prayati, Chun Wong, Paul Marchal, Nathalie Cossement, Francky Catthoor, Rudy Lauwereins, Diederik Verkest, Hugo De Man, Alexios N. Birbas
    Task Concurrency Management Experiment for Power-Efficient Speed-up of Embedded MPEG4 IM1 Player. [Citation Graph (0, 0)][DBLP]
    ICPP Workshops, 2000, pp:453-460 [Conf]
  38. Richard Stahl, Francky Catthoor, Diederik Verkest
    Object-Distribution Analysis: Technique for Parallel Loop Distribution of Object-Oriented Programs. [Citation Graph (0, 0)][DBLP]
    ICPP Workshops, 2005, pp:153-160 [Conf]
  39. Diederik Verkest, Luc J. M. Claesen, Hugo De Man
    A Proof of the Non-Restoring Division Algorithm and its Implementation on the Cathedral-II ALU. [Citation Graph (0, 0)][DBLP]
    Designing Correct Circuits, 1992, pp:173-192 [Conf]
  40. Vincent Nollet, Paul Coene, Diederik Verkest, Serge Vernalde, Rudy Lauwereins
    Designing an Operating System for a Heterogeneous Reconfigurable So. [Citation Graph (0, 0)][DBLP]
    IPDPS, 2003, pp:174- [Conf]
  41. Richard Stahl, Francky Catthoor, Diederik Verkest
    Object-Distribution Analysis for Program Decomposition and Re-Clustering. [Citation Graph (0, 0)][DBLP]
    IPDPS, 2005, pp:- [Conf]
  42. Richard Stahl, Robert Pasko, Francky Catthoor, Rudy Lauwereins, Diederik Verkest
    High-Level Data-Access Analysis for Characterisation of (Sub)task-Level Parallelism in Java. [Citation Graph (0, 0)][DBLP]
    IPDPS, 2004, pp:31-40 [Conf]
  43. Julio Leao da Silva Jr., Francky Catthoor, Diederik Verkest, Hugo De Man
    Power exploration for dynamic data types through virtual memory management refinement. [Citation Graph (0, 0)][DBLP]
    ISLPED, 1998, pp:311-316 [Conf]
  44. Francky Catthoor, Diederik Verkest, Erik Brockmeyer
    Proposal for Unified System Design Meta Flow in Task-Level and Instruction-Level Design Technology Research for Multi-Media Applications. [Citation Graph (0, 0)][DBLP]
    ISSS, 1998, pp:89-95 [Conf]
  45. Tycho van Meeuwen, Arnout Vandecappelle, Allert van Zelst, Francky Catthoor, Diederik Verkest
    System-level interconnect architecture exploration for custom memory organizations. [Citation Graph (0, 0)][DBLP]
    ISSS, 2001, pp:13-18 [Conf]
  46. Miguel Miranda, C. Ghez, Chidamber Kulkarni, Francky Catthoor, Diederik Verkest
    Systematic speed-power memory data-layout exploration for cache controlled embedded multimedia applications. [Citation Graph (0, 0)][DBLP]
    ISSS, 2001, pp:107-112 [Conf]
  47. Steven Vercauteren, Diederik Verkest, Gjalt G. de Jong, Bill Lin
    Derivation of Formal Representations from Process-Based Specification and Implementation Models. [Citation Graph (0, 0)][DBLP]
    ISSS, 1997, pp:16-0 [Conf]
  48. Chantal Ykman-Couvreur, J. Lambrecht, Diederik Verkest, Francky Catthoor, Hugo De Man
    Exploration and Synthesis of Dynamic Data Sets in Telecom Network Applications. [Citation Graph (0, 0)][DBLP]
    ISSS, 1999, pp:85-93 [Conf]
  49. Frederik Vermeulen, Lode Nachtergaele, Francky Catthoor, Diederik Verkest, Hugo De Man
    Flexible hardware acceleration for multimedia oriented microprocessors. [Citation Graph (0, 0)][DBLP]
    MICRO, 2000, pp:171-177 [Conf]
  50. Paul Marchal, Chun Wong, Aggeliki Prayati, Nathalie Cossement, Francky Catthoor, Rudy Lauwereins, Diederik Verkest, Hugo De Man
    Dynamic Memory Oriented Transformations in the MPEG4 IM1-Player on a Low Power Platform. [Citation Graph (0, 0)][DBLP]
    PACS, 2000, pp:40-50 [Conf]
  51. David Atienza, Praveen Raghavan, José L. Ayala, Giovanni De Micheli, Francky Catthoor, Diederik Verkest, Marisa López-Vallejo
    Compiler-Driven Leakage Energy Reduction in Banked Register Files. [Citation Graph (0, 0)][DBLP]
    PATMOS, 2006, pp:107-116 [Conf]
  52. Bert Geelen, Gauthier Lafruit, V. Ferentinos, Rudy Lauwereins, Diederik Verkest
    Memory Hierarchy Energy Cost of a Direct Filtering Implementation of the Wavelet Transform. [Citation Graph (0, 0)][DBLP]
    PATMOS, 2005, pp:107-116 [Conf]
  53. Daniele Paolo Scarpazza, Praveen Raghavan, David Novo, Francky Catthoor, Diederik Verkest
    Software Simultaneous Multi-Threading, a Technique to Exploit Task-Level Parallelism to Improve Instruction- and Data-Level Parallelism. [Citation Graph (0, 0)][DBLP]
    PATMOS, 2006, pp:12-23 [Conf]
  54. Andy Lambrechts, Tom Vander Aa, Murali Jayapala, Guillermo Talavera, Anthony Leroy, Adelina Shickova, Francisco Barat, Bingfeng Mei, Francky Catthoor, Diederik Verkest, Geert Deconinck, Henk Corporaal, Frédéric Robert, Jordi Carrabina Bordoll
    Design Style Case Study for Embedded Multi Media Compute Nodes. [Citation Graph (0, 0)][DBLP]
    RTSS, 2004, pp:104-113 [Conf]
  55. Dirk Desmet, Prabhat Avasare, Paul Coene, Stijn Decneut, Filip Hendrickx, Théodore Marescaux, Jean-Yves Mignolet, Robert Pasko, Patrick Schaumont, Diederik Verkest
    Design of Cam-E-leon, a Run-Time Reconfigurable Web Camera. [Citation Graph (0, 0)][DBLP]
    Embedded Processor Design Challenges, 2002, pp:274-290 [Conf]
  56. Richard Stahl, Robert Pasko, Luc Rijnders, Diederik Verkest, Serge Vernalde, Rudy Lauwereins, Francky Catthoor
    Performance Analysis for Identification of (Sub-)Task-Level Parallelism in Java. [Citation Graph (0, 0)][DBLP]
    SCOPES, 2003, pp:313-328 [Conf]
  57. Diederik Verkest, J. Vandenbergh, Luc J. M. Claesen, Hugo De Man
    A Description Methodology for Parameterized Modules in the Boyer-Moore Logic. [Citation Graph (0, 0)][DBLP]
    TPCD, 1992, pp:37-57 [Conf]
  58. Catia M. Angelo, Diederik Verkest, Luc J. M. Claesen, Hugo De Man
    Formal Hardware Verification in HOL and in Boyer-Moore: A Comparative Analysis. [Citation Graph (0, 0)][DBLP]
    TPHOLs, 1991, pp:340-347 [Conf]
  59. Bingfeng Mei, Andy Lambrechts, Diederik Verkest, Jean-Yves Mignolet, Rudy Lauwereins
    Architecture Exploration for a Reconfigurable Architecture Template. [Citation Graph (0, 0)][DBLP]
    IEEE Design & Test of Computers, 2005, v:22, n:2, pp:90-101 [Journal]
  60. Javier Resano, Daniel Mozos, Diederik Verkest, Francky Catthoor
    A Reconfiguration Manager for Dynamically Reconfigurable Hardware. [Citation Graph (0, 0)][DBLP]
    IEEE Design & Test of Computers, 2005, v:22, n:5, pp:452-460 [Journal]
  61. Peng Yang, Chun Wong, Paul Marchal, Francky Catthoor, Dirk Desmet, Diederik Verkest, Rudy Lauwereins
    Energy-Aware Runtime Scheduling for Embedded-Multiprocessor SOCs. [Citation Graph (0, 0)][DBLP]
    IEEE Design & Test of Computers, 2001, v:18, n:5, pp:46-58 [Journal]
  62. Catia M. Angelo, Diederik Verkest, Luc J. M. Claesen, Hugo De Man
    On the Comparison of HOL and Boyer-Moore for Formal Hardware Verification. [Citation Graph (0, 0)][DBLP]
    Formal Methods in System Design, 1993, v:2, n:1, pp:45-72 [Journal]
  63. Diederik Verkest, Luc J. M. Claesen, Hugo De Man
    A Proof of the Nonrestoring Division Algorithm and its Implementation on an ALU. [Citation Graph (0, 0)][DBLP]
    Formal Methods in System Design, 1994, v:4, n:1, pp:5-31 [Journal]
  64. Théodore Marescaux, Vincent Nollet, Jean-Yves Mignolet, Andrei Bartic, W. Moffat, Prabhat Avasare, Paul Coene, Diederik Verkest, Serge Vernalde, Rudy Lauwereins
    Run-time support for heterogeneous multitasking on reconfigurable SoCs. [Citation Graph (0, 0)][DBLP]
    Integration, 2004, v:38, n:1, pp:107-130 [Journal]
  65. Gaetano Borriello, Diederik Verkest, Francky Catthoor
    Guest Editorial. [Citation Graph (0, 0)][DBLP]
    IEEE Trans. on CAD of Integrated Circuits and Systems, 1999, v:18, n:1, pp:1-2 [Journal]
  66. Theofanis Orphanoudakis, Stylianos Perissakis, Kostas Pramataris, Nikos A. Nikolaou, Nicholas Zervos, Matthias Steck, Christoph Baumhof, Diederik Verkest, Chantal Ykman-Couvreur, Gregory Doumenis, Fotis Karoubalis, Ioanna Theologitou, Dionisios I. Reisis, George E. Konstantoulakis, Nikos Vogiatzis
    Hardware Architectures for the Efficient Implementation of Multi-Service Broadband Access and Multimedia Home Networks. [Citation Graph (0, 0)][DBLP]
    Telecommunication Systems, 2003, v:23, n:3-4, pp:351-367 [Journal]
  67. Javier Resano, Diederik Verkest, Daniel Mozos, Serge Vernalde, Francky Catthoor
    A hybrid design-time/run-time scheduling flow to minimise the reconfiguration overhead of FPGAs. [Citation Graph (0, 0)][DBLP]
    Microprocessors and Microsystems, 2004, v:28, n:5-6, pp:291-301 [Journal]
  68. Praveen Raghavan, Andy Lambrechts, Murali Jayapala, Francky Catthoor, Diederik Verkest, Henk Corporaal
    Very wide register: an asymmetric register file organization for low power embedded processors. [Citation Graph (0, 0)][DBLP]
    DATE, 2007, pp:1066-1071 [Conf]
  69. Praveen Raghavan, Nandhavel Sethubalasubramanian, Satyakiran Munaga, Estela Rey Ramos, Murali Jayapala, Oliver Weiss, Francky Catthoor, Diederik Verkest
    Semi Custom Design: A Case Study on SIMD Shufflers. [Citation Graph (0, 0)][DBLP]
    PATMOS, 2007, pp:433-442 [Conf]
  70. Frederik Vermeulen, Francky Catthoor, Diederik Verkest, Hugo De Man
    Formalized three-layer system-level model and reuse methodology for embedded data-dominated applications. [Citation Graph (0, 0)][DBLP]
    IEEE Trans. VLSI Syst., 2000, v:8, n:2, pp:207-216 [Journal]
  71. Chantal Ykman-Couvreur, J. Lambrecht, Diederik Verkest, Francky Catthoor, Bengt Svantesson, Ahmed Hemani, F. Wolf
    Dynamic memory management methodology applied to embedded telecom network systems. [Citation Graph (0, 0)][DBLP]
    IEEE Trans. VLSI Syst., 2002, v:10, n:5, pp:650-667 [Journal]
  72. Frederik Vermeulen, Francky Catthoor, Lode Nachtergaele, Diederik Verkest, Hugo De Man
    Power-efficient flexible processor architecture for embedded applications. [Citation Graph (0, 0)][DBLP]
    IEEE Trans. VLSI Syst., 2003, v:11, n:3, pp:376-385 [Journal]

  73. Multimedia systems in a changing technology landscape. [Citation Graph (, )][DBLP]


  74. Adaptive mapping to resource availability for dynamic wavelet-based applications. [Citation Graph (, )][DBLP]


  75. Correctness proofs of parameterized hardware modules in the CATHEDRAL-II synthesis environment. [Citation Graph (, )][DBLP]


  76. Coffee: COmpiler Framework for Energy-Aware Exploration. [Citation Graph (, )][DBLP]


  77. Interconnect Power Analysis for a Coarse-Grained Reconfigurable Array Processor. [Citation Graph (, )][DBLP]


  78. Energy-Aware Interconnect Optimization for a Coarse Grained Reconfigurable Processor. [Citation Graph (, )][DBLP]


  79. Software-Controlled Scratchpad Mapping Strategies for Wavelet-Based Applications. [Citation Graph (, )][DBLP]


  80. Spatial locality trade-offs of wavelet-based applications in dynamic execution environments. [Citation Graph (, )][DBLP]


Search in 0.005secs, Finished in 0.605secs
NOTICE1
System may not be available sometimes or not working properly, since it is still in development with continuous upgrades
NOTICE2
The rankings that are presented on this page should NOT be considered as formal since the citation info is incomplete in DBLP
 
Introduction Collection Based Clustering Ranking Paper Based Journals Conferences DB Status Statistics Search
System created by asidirop@csd.auth.gr [http://users.auth.gr/~asidirop/] © 2002
for Data Engineering Laboratory, Department of Informatics, Aristotle University © 2002