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Publications of Author

1. Guillermo Payá Vayá, Javier Martín-Langerwerf, Piriya Taptimthong, Peter Pirsch
   Design Space Exploration of Media Processors: A Generic VLIW Architecture and a Parameterized Scheduler. [Citation Graph (0, 0)][DBLP]
   ARCS, 2007, pp:254-267 [Conf]
   
2. Guillermo Payá Vayá, Marcos Martínez Peiró, Francisco Ballester, Francisco Mora
   Fully Parameterized Discrete Wavelet Packet Transform Architecture Oriented to FPGA. [Citation Graph (0, 0)][DBLP]
   FPL, 2003, pp:533-542 [Conf]
   
3. Marcos Martínez Peiró, Francisco Ballester, Guillermo Payá Vayá, Ricardo José Colom-Palero, Rafael Gadea Gironés, J. Belenguer
   FPGA Custom DSP for ECG Signal Analysis and Compression. [Citation Graph (0, 0)][DBLP]
   FPL, 2004, pp:954-958 [Conf]
   
4. Arturo Méndez Patiño, Marcos Martínez Peiró, Francisco Ballester, Guillermo Payá Vayá
   2D-DCT on FPGA by polynomial transformation in two-dimensions. [Citation Graph (0, 0)][DBLP]
   ISCAS (3), 2004, pp:365-368 [Conf]
   
5. Joaquín Cerdá, Rafael Gadea Gironés, Guillermo Payá Vayá
   Implementing a Margolus Neighborhood Cellular Automata on a FPGA. [Citation Graph (0, 0)][DBLP]
   IWANN (2), 2003, pp:121-128 [Conf]
   
6. Guillermo Payá Vayá, Javier Martín-Langerwerf, Peter Pirsch
   RAPANUI: Rapid Prototyping for Media Processor Architecture Exploration. [Citation Graph (0, 0)][DBLP]
   SAMOS, 2005, pp:32-40 [Conf]
   
7. Guillermo Payá Vayá, Javier Martín-Langerwerf, Piriya Taptimthong, Peter Pirsch
   Design Space Exploration of Media Processors: A Parameterized Scheduler. [Citation Graph (0, 0)][DBLP]
   ICSAMOS, 2007, pp:41-49 [Conf]
   
8. 
   An Enhanced DMA Controller in SIMD Processors for Video Applications. [Citation Graph (, )][DBLP]
   
   
9. 
   RAPANUI: A case study in Rapid Prototyping for Multiprocessor System-on-Chip. [Citation Graph (, )][DBLP]
   
   
10. 
    ChipDesign: from theory to real world. [Citation Graph (, )][DBLP]