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Alexey Kupriyanov: [Publications] [Author Rank by year] [Co-authors] [Prefers] [Cites] [Cited by]

Publications of Author

  1. Alexey Kupriyanov, Frank Hannig, Dmitrij Kissler, Jürgen Teich, Julien Lallet, Olivier Sentieys, Sébastien Pillement
    Modeling of Interconnection Networks in Massively Parallel Processor Architectures. [Citation Graph (0, 0)][DBLP]
    ARCS, 2007, pp:268-282 [Conf]
  2. Dmitrij Kissler, Alexey Kupriyanov, Frank Hannig, Dirk Koch, Jürgen Teich
    A Generic Framework for Rapid Prototyping of System-on-Chip Designs. [Citation Graph (0, 0)][DBLP]
    CDES, 2006, pp:189-195 [Conf]
  3. Frank Hannig, Hritam Dutta, Alexey Kupriyanov, Jürgen Teich, Rainer Schaffer, Sebastian Siegel, Renate Merker, Ronan Keryell, Bernard Pottier, Daniel Chillet, Daniel Menard, Olivier Sentieys
    Co-Design of Massively Parallel Embedded Processor Architectures. [Citation Graph (0, 0)][DBLP]
    ReCoSoC, 2005, pp:27-34 [Conf]
  4. Dmitrij Kissler, Frank Hannig, Alexey Kupriyanov, Jürgen Teich
    A Dynamically Reconfigurable Weakly Programmable Processor Array Architecture Template. [Citation Graph (0, 0)][DBLP]
    ReCoSoC, 2006, pp:31-37 [Conf]
  5. Alexey Kupriyanov, Frank Hannig, Jürgen Teich
    High-Speed Event-Driven RTL Compiled Simulation. [Citation Graph (0, 0)][DBLP]
    SAMOS, 2004, pp:519-529 [Conf]
  6. Hritam Dutta, Frank Hannig, Alexey Kupriyanov, Dmitrij Kissler, Jürgen Teich, Rainer Schaffer, Sebastian Siegel, Renate Merker, Bernard Pottier
    Massively Parallel Processor Architectures: A Co-design Approach. [Citation Graph (0, 0)][DBLP]
    ReCoSoC, 2007, pp:61-68 [Conf]

  7. Efficient event-driven simulation of parallel processor architectures. [Citation Graph (, )][DBLP]


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