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Sascha Uhrig: [Publications] [Author Rank by year] [Co-authors] [Prefers] [Cites] [Cited by]

Publications of Author

  1. Sascha Uhrig, Theo Ungerer
    Energy Management for Embedded Multithreaded Processors with Integrated EDF Scheduling. [Citation Graph (0, 0)][DBLP]
    ARCS, 2005, pp:1-17 [Conf]
  2. Uwe Brinkschulte, Jürgen Becker, Klaus Dorfmüller-Ulhaas, Ralf König, Sascha Uhrig, Theo Ungerer
    CARUSO - Project Goals and Principal Approach. [Citation Graph (0, 0)][DBLP]
    GI Jahrestagung (2), 2004, pp:616-620 [Conf]
  3. Sascha Uhrig, S. Maier, Georgi Kuzmanov, Theo Ungerer
    Coupling of a reconfigurable architecture and a multithreaded processor core with integrated real-time scheduling. [Citation Graph (0, 0)][DBLP]
    IPDPS, 2006, pp:- [Conf]
  4. Matthias Pfeffer, Sascha Uhrig, Theo Ungerer, Uwe Brinkschulte
    A Real-Time Java System on a Multithreaded Java Microcontroller. [Citation Graph (0, 0)][DBLP]
    Symposium on Object-Oriented Real-Time Distributed Computing, 2002, pp:34-0 [Conf]
  5. Sascha Uhrig, Theo Ungerer
    Hardware-based Power Management for Real-Time Applications. [Citation Graph (0, 0)][DBLP]
    ISPDC, 2003, pp:258-265 [Conf]
  6. Sascha Uhrig, Theo Ungerer
    Fine-grained power management for multithreaded processor cores. [Citation Graph (0, 0)][DBLP]
    SAC, 2004, pp:907-908 [Conf]
  7. Uwe Brinkschulte, Sascha Uhrig, Theo Ungerer
    Der mehrfädige Komodo-Mikrocontroller (The Multithreaded Komodo Microcontroller). [Citation Graph (0, 0)][DBLP]
    it - Information Technology, 2005, v:47, n:3, pp:117-122 [Journal]
  8. Jochen Kreuzinger, Uwe Brinkschulte, Matthias Pfeffer, Sascha Uhrig, Theo Ungerer
    Real-time event-handling and scheduling on a multithreaded Java microcontroller. [Citation Graph (0, 0)][DBLP]
    Microprocessors and Microsystems, 2003, v:27, n:1, pp:19-31 [Journal]
  9. Sascha Uhrig, Jörg Mische, Theo Ungerer
    An IP Core for Embedded Java Systems. [Citation Graph (0, 0)][DBLP]
    SAMOS, 2007, pp:263-272 [Conf]

  10. Dynamic Workload Prediction for Soft Real-Time Applications. [Citation Graph (, )][DBLP]

  11. A Garbage Collection Technique for Embedded Multithreaded Multicore Processors. [Citation Graph (, )][DBLP]

  12. How to Enhance a Superscalar Processor to Provide Hard Real-Time Capable In-Order SMT. [Citation Graph (, )][DBLP]

  13. An Operating System Architecture for Organic Computing in Embedded Real-Time Systems. [Citation Graph (, )][DBLP]

  14. IPC Control for Multiple Real-Time Threads on an In-Order SMT Processor. [Citation Graph (, )][DBLP]

  15. Exploiting spare resources of in-order SMT processors executing hard real-time threads. [Citation Graph (, )][DBLP]

  16. Evaluation of Different Multithreaded and Multicore Processor Configurations for SoPC. [Citation Graph (, )][DBLP]

  17. A Two-Layered Management Architecture for Building Adaptive Real-Time Systems. [Citation Graph (, )][DBLP]

  18. jamuth: an IP processor core for embedded Java real-time systems. [Citation Graph (, )][DBLP]

  19. The embedded Java benchmark suite JemBench. [Citation Graph (, )][DBLP]

  20. The MANy JAva Core processor (MANJAC). [Citation Graph (, )][DBLP]

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