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Naofumi Takagi: [Publications] [Author Rank by year] [Co-authors] [Prefers] [Cites] [Cited by]

Publications of Author

  1. Hannes Hassler, Naofumi Takagi
    Function Evaluation by Table Look-up and Addition. [Citation Graph (0, 0)][DBLP]
    IEEE Symposium on Computer Arithmetic, 1995, pp:10-16 [Conf]
  2. Masayuki Ito, Naofumi Takagi, Shuzo Yajima
    Efficient Initial Approximation and Fast Converging Methods for Division and Square Root. [Citation Graph (0, 0)][DBLP]
    IEEE Symposium on Computer Arithmetic, 1995, pp:2-8 [Conf]
  3. Marcelo E. Kaihara, Naofumi Takagi
    A VLSI Algorithm for Modular Multiplication/Division. [Citation Graph (0, 0)][DBLP]
    IEEE Symposium on Computer Arithmetic, 2003, pp:220-227 [Conf]
  4. Takafumi Hamano, Naofumi Takagi, Shuzo Yajima, Franco P. Preparata
    O(n)-depth circuit algorithm for modular exponentiation. [Citation Graph (0, 0)][DBLP]
    IEEE Symposium on Computer Arithmetic, 1995, pp:188-192 [Conf]
  5. Naofumi Takagi
    A Hardware Algorithm for Computing Reciprocal Square Root. [Citation Graph (0, 0)][DBLP]
    IEEE Symposium on Computer Arithmetic, 2001, pp:94-100 [Conf]
  6. Naofumi Takagi
    Generating a Power of an Operand by a Table Look-up and a Multiplication. [Citation Graph (0, 0)][DBLP]
    IEEE Symposium on Computer Arithmetic, 1997, pp:126-131 [Conf]
  7. Naofumi Takagi, Seiji Kuwahara
    Digit-Recurrence Algorithm for Computing Euclidean Norm of a 3-D Vector. [Citation Graph (0, 0)][DBLP]
    IEEE Symposium on Computer Arithmetic, 1999, pp:86-0 [Conf]
  8. Naofumi Takagi, Shunsuke Kadowaki, Kazuyoshi Takagi
    A Hardware Algorithm for Integer Division. [Citation Graph (0, 0)][DBLP]
    IEEE Symposium on Computer Arithmetic, 2005, pp:140-146 [Conf]
  9. Marcelo E. Kaihara, Naofumi Takagi
    Bipartite Modular Multiplication. [Citation Graph (0, 0)][DBLP]
    CHES, 2005, pp:201-210 [Conf]
  10. Naofumi Takagi
    Multiple-Valued-Digit Number Representations in Arithmetic Circuit Algorithms. [Citation Graph (0, 0)][DBLP]
    ISMVL, 2002, pp:224-0 [Conf]
  11. Hiroto Yasuura, Naofumi Takagi, Srivaths Ravi, Michael Torla, Catherine H. Gebotys
    Special Session: Security on SoC. [Citation Graph (0, 0)][DBLP]
    ISSS, 2002, pp:192-194 [Conf]
  12. Akira Higuchi, Naofumi Takagi
    A fast addition algorithm for elliptic curve arithmetic in GF(2n) using projective coordinates. [Citation Graph (0, 0)][DBLP]
    Inf. Process. Lett., 2000, v:76, n:3, pp:101-103 [Journal]
  13. Masayuki Ito, Naofumi Takagi, Shuzo Yajima
    Square Rooting by Iterative Multiply-Additions. [Citation Graph (0, 0)][DBLP]
    Inf. Process. Lett., 1996, v:60, n:5, pp:267-269 [Journal]
  14. Takafumi Hamano, Naofumi Takagi, Shuzo Yajima, Franco P. Preparata
    O(n)-Depth Modular Exponentiation Circuit Algorithm. [Citation Graph (0, 0)][DBLP]
    IEEE Trans. Computers, 1997, v:46, n:6, pp:701-704 [Journal]
  15. Massayuki Ito, Naofumi Takagi, Shuzo Yajima
    Efficient Initial Approximation for Multiplicative Division and Square Root by a Multiplication with Operand Modification. [Citation Graph (0, 0)][DBLP]
    IEEE Trans. Computers, 1997, v:46, n:4, pp:495-498 [Journal]
  16. Marcelo E. Kaihara, Naofumi Takagi
    A Hardware Algorithm for Modular Multiplication/Division. [Citation Graph (0, 0)][DBLP]
    IEEE Trans. Computers, 2005, v:54, n:1, pp:12-21 [Journal]
  17. Naofumi Takagi
    A Radix-4 Modular Multiplication Hardware Algorithm for Modular Exponentiation. [Citation Graph (0, 0)][DBLP]
    IEEE Trans. Computers, 1992, v:41, n:8, pp:949-956 [Journal]
  18. Naofumi Takagi
    Powering by a Table Look-Up and a Multiplication with Operand Modification. [Citation Graph (0, 0)][DBLP]
    IEEE Trans. Computers, 1998, v:47, n:11, pp:1216-1222 [Journal]
  19. Naofumi Takagi, Tohru Asada, Shuzo Yajima
    Redundant CORDIC Methods with a Constant Scale Factor for Sine and Cosine Computation. [Citation Graph (0, 0)][DBLP]
    IEEE Trans. Computers, 1991, v:40, n:9, pp:989-995 [Journal]
  20. Naofumi Takagi, Takashi Horiyama
    A High-Speed Reduced-Size Adder Under Left-to-Right Input Arrival. [Citation Graph (0, 0)][DBLP]
    IEEE Trans. Computers, 1999, v:48, n:1, pp:76-80 [Journal]
  21. Naofumi Takagi, Seiji Kuwahara
    A VLSI Algorithm for Computing the Euclidean Norm of a 3D Vector. [Citation Graph (0, 0)][DBLP]
    IEEE Trans. Computers, 2000, v:49, n:10, pp:1074-1082 [Journal]
  22. Naofumi Takagi, Shuzo Yajima
    On-Line Error-Detectable High-Speed Multiplier Using Redundant Binary Representation and Three-Rail Logic. [Citation Graph (0, 0)][DBLP]
    IEEE Trans. Computers, 1987, v:36, n:11, pp:1310-1317 [Journal]
  23. Naofumi Takagi, Shuzo Yajima
    Modular Multiplication Hardware Algorithms with a Redundant Representation and Their Application to RSA Cryptosystem. [Citation Graph (0, 0)][DBLP]
    IEEE Trans. Computers, 1992, v:41, n:7, pp:887-891 [Journal]
  24. Naofumi Takagi, Jun-ichi Yoshiki, Kazuyoshi Takagi
    A Fast Algorithm for Multiplicative Inversion in GF(2m) Using Normal Basis. [Citation Graph (0, 0)][DBLP]
    IEEE Trans. Computers, 2001, v:50, n:5, pp:394-398 [Journal]
  25. Naofumi Takagi, Hiroto Yasuura, Shuzo Yajima
    High-Speed VLSI Multiplication Algorithm with a Redundant Binary Addition Tree. [Citation Graph (0, 0)][DBLP]
    IEEE Trans. Computers, 1985, v:34, n:9, pp:789-796 [Journal]
  26. Hiroto Yasuura, Naofumi Takagi, Shuzo Yajima
    The Parallel Enumeration Sorting Scheme for VLSI. [Citation Graph (0, 0)][DBLP]
    IEEE Trans. Computers, 1982, v:31, n:12, pp:1192-1201 [Journal]
  27. Nhon T. Quach, Naofumi Takagi, Michael J. Flynn
    Systematic IEEE rounding method for high-speed floating-point multipliers. [Citation Graph (0, 0)][DBLP]
    IEEE Trans. VLSI Syst., 2004, v:12, n:5, pp:511-521 [Journal]
  28. Katsuki Kobayashi, Naofumi Takagi, Kazuyoshi Takagi
    An Algorithm for Inversion in GF(2^m) Suitable for Implementation Using a Polynomial Multiply Instruction on GF(2). [Citation Graph (0, 0)][DBLP]
    IEEE Symposium on Computer Arithmetic, 2007, pp:105-112 [Conf]

  29. Fast and memory efficient VLSI architecture for output probability computations of HMM-based recognition systems. [Citation Graph (, )][DBLP]


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