The SCEAS System
Navigation Menu

Search the dblp DataBase

Title:
Author:

Kolar L. Kodandapani: [Publications] [Author Rank by year] [Co-authors] [Prefers] [Cites] [Cited by]

Publications of Author

  1. Kolar L. Kodandapani, Dhiraj K. Pradhan
    Undetectability of Bridging Faults and Validity of Stuck-At Fault Test Sets. [Citation Graph (0, 0)][DBLP]
    IEEE Trans. Computers, 1980, v:29, n:1, pp:55-59 [Journal]
  2. Kolar L. Kodandapani, Rangaswamy V. Setlur
    Reed-Muller Canonical Forms in Multivalued Logic. [Citation Graph (0, 0)][DBLP]
    IEEE Trans. Computers, 1975, v:24, n:6, pp:628-636 [Journal]
  3. Kolar L. Kodandapani, Rangaswamy V. Setlur
    A Note on Minimal Reed-Muller Canonical Forms of Switching Functions. [Citation Graph (0, 0)][DBLP]
    IEEE Trans. Computers, 1977, v:26, n:3, pp:310-313 [Journal]
  4. Kolar L. Kodandapani, Rangaswamy V. Setlur
    A Cellular Array for Multivalued Logic Functions. [Citation Graph (0, 0)][DBLP]
    IEEE Trans. Computers, 1978, v:27, n:11, pp:1055-1059 [Journal]
  5. Kolar L. Kodandapani, Sharad C. Seth
    On Combinational Networks with Restricted Fan-Out. [Citation Graph (0, 0)][DBLP]
    IEEE Trans. Computers, 1978, v:27, n:4, pp:309-318 [Journal]
  6. Dhiraj K. Pradhan, Kolar L. Kodandapani
    A Uniform Representation of Single- and Multistage Interconnection Networks Used in SIMD Machines. [Citation Graph (0, 0)][DBLP]
    IEEE Trans. Computers, 1980, v:29, n:9, pp:777-791 [Journal]
  7. Sharad C. Seth, Kolar L. Kodandapani
    Diagnosis of Faults in Linear Tree Networks. [Citation Graph (0, 0)][DBLP]
    IEEE Trans. Computers, 1977, v:26, n:1, pp:29-33 [Journal]

Search in 0.001secs, Finished in 0.001secs
NOTICE1
System may not be available sometimes or not working properly, since it is still in development with continuous upgrades
NOTICE2
The rankings that are presented on this page should NOT be considered as formal since the citation info is incomplete in DBLP
 
System created by asidirop@csd.auth.gr [http://users.auth.gr/~asidirop/] © 2002
for Data Engineering Laboratory, Department of Informatics, Aristotle University © 2002