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Julio Villalba: [Publications] [Author Rank by year] [Co-authors] [Prefers] [Cites] [Cited by]

Publications of Author

  1. Elisardo Antelo, Javier D. Bruguera, Julio Villalba, Emilio L. Zapata
    Redundant CORDIC Rotator Based on Parallel Prediction. [Citation Graph (0, 0)][DBLP]
    IEEE Symposium on Computer Arithmetic, 1995, pp:172-179 [Conf]
  2. Elisardo Antelo, Julio Villalba
    Low Latency Pipelined Circular CORDIC. [Citation Graph (0, 0)][DBLP]
    IEEE Symposium on Computer Arithmetic, 2005, pp:280-287 [Conf]
  3. Javier Hormigo, Julio Villalba, Emilio L. Zapata
    Interval Sine and Cosine Functions Computation Based on Variable-Precision CORDIC Algorithm. [Citation Graph (0, 0)][DBLP]
    IEEE Symposium on Computer Arithmetic, 1999, pp:186-193 [Conf]
  4. Javier Hormigo, Julio Villalba, Michael J. Schulte
    A Hardware Algorithm for Variable-Precision Logarithm. [Citation Graph (0, 0)][DBLP]
    ASAP, 2000, pp:215-224 [Conf]
  5. Francisco J. Jaime, Julio Villalba, Javier Hormigo, Emilio L. Zapata
    Pipelined Range Reduction for Floating Point Numbers. [Citation Graph (0, 0)][DBLP]
    ASAP, 2006, pp:145-152 [Conf]
  6. Roberto R. Osorio, Elisardo Antelo, Javier D. Bruguera, Julio Villalba, Emilio L. Zapata
    Digit On-line Large Radix CORDIC Rotator. [Citation Graph (0, 0)][DBLP]
    ASAP, 1995, pp:246-257 [Conf]
  7. Julio Villalba, J. C. Arrabal, Emilio L. Zapata, Elisardo Antelo, Javier D. Bruguera
    Radix-4 Vectoring Cordic Algorithm And Architectures. [Citation Graph (0, 0)][DBLP]
    ASAP, 1996, pp:55-64 [Conf]
  8. Julio Villalba, Gerardo Bandera, Mario A. González, Javier Hormigo, Emilio L. Zapata
    Polynomial Evaluation on Multimedia Processors. [Citation Graph (0, 0)][DBLP]
    ASAP, 2002, pp:265-0 [Conf]
  9. Julio Villalba, Javier Hormigo, Jose M. Prades, Emilio L. Zapata
    On-line Multioperand Addition Based on On-line Full Adders. [Citation Graph (0, 0)][DBLP]
    ASAP, 2005, pp:322-327 [Conf]
  10. Julio Villalba, J. A. Hidalgo, Emilio L. Zapata, Elisardo Antelo, Javier D. Bruguera
    CORDIC Architectures with Parallel Compensation of the Scale Factor. [Citation Graph (0, 0)][DBLP]
    ASAP, 1995, pp:258-269 [Conf]
  11. Julio Villalba, Tomás Lang
    Low latency word serial CORDIC. [Citation Graph (0, 0)][DBLP]
    ASAP, 1997, pp:124-131 [Conf]
  12. Javier Hormigo, Julio Villalba, Emilio L. Zapata
    Arithmetic Unit for the Computation of Interval Elementary Functions. [Citation Graph (0, 0)][DBLP]
    EUROMICRO, 1999, pp:1063-1066 [Conf]
  13. Elisardo Antelo, Javier D. Bruguera, Tomás Lang, Julio Villalba, Emilio L. Zapata
    High Radix Cordic Rotation Based on Selection by Rounding. [Citation Graph (0, 0)][DBLP]
    Euro-Par, Vol. II, 1996, pp:155-164 [Conf]
  14. Joaquín Olivares, Javier Hormigo, Julio Villalba, Ignacio Benavides
    Minimum Sum of Absolute Differences Implementation in a Single FPGA Device. [Citation Graph (0, 0)][DBLP]
    FPL, 2004, pp:986-990 [Conf]
  15. Julio Villalba, Javier Hormigo, Mario A. González, Emilio L. Zapata
    MMX-Like Architecture Extension to Support the Rotation Operation. [Citation Graph (0, 0)][DBLP]
    IEEE International Conference on Multimedia and Expo (III), 2000, pp:1383-1386 [Conf]
  16. Gerardo Bandera, Mario Gonzalez, Julio Villalba, Javier Hormigo, Emilio L. Zapata
    Evaluation of Elementary Functions Using Multimedia Features. [Citation Graph (0, 0)][DBLP]
    IPDPS, 2004, pp:- [Conf]
  17. Elisardo Antelo, Julio Villalba, Javier D. Bruguera, Emilio L. Zapata
    High Performance Rotation Architectures Based on the Radix-4 CORDIC Algorithm. [Citation Graph (0, 0)][DBLP]
    IEEE Trans. Computers, 1997, v:46, n:8, pp:855-870 [Journal]
  18. Julio Villalba, Tomás Lang, Mario A. González
    Double-Residue Modular Range Reduction for Floating-Point Hardware Implementations. [Citation Graph (0, 0)][DBLP]
    IEEE Trans. Computers, 2006, v:55, n:3, pp:254-267 [Journal]
  19. Nicolas Guil, Julio Villalba, Emilio L. Zapata
    A fast Hough transform for segment detection. [Citation Graph (0, 0)][DBLP]
    IEEE Transactions on Image Processing, 1995, v:4, n:11, pp:1541-1548 [Journal]
  20. Joaquín Olivares, Javier Hormigo, Julio Villalba, Ignacio Benavides, Emilio L. Zapata
    SAD computation based on online arithmetic for motion estimation. [Citation Graph (0, 0)][DBLP]
    Microprocessors and Microsystems, 2006, v:30, n:5, pp:250-258 [Journal]
  21. Joaquín Olivares, Ignacio Benavides, Javier Hormigo, Julio Villalba, Emilio L. Zapata
    Fast Full-Search Block Matching Algorithm Motion Estimation Alternatives in FPGA. [Citation Graph (0, 0)][DBLP]
    FPL, 2006, pp:1-4 [Conf]

  22. Computation of Decimal Transcendental Functions Using the CORDIC Algorithm. [Citation Graph (, )][DBLP]


  23. Improving the Throughput of On-line Addition for Data Streams. [Citation Graph (, )][DBLP]


  24. Efficient Implementation of Carry-Save Adders in FPGAs. [Citation Graph (, )][DBLP]


  25. SIMD Enhancements for a Hough Transform Implementation. [Citation Graph (, )][DBLP]


  26. New SIMD instructions set for image processing applications enhancement. [Citation Graph (, )][DBLP]


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