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Mark R. Pinto:
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Publications of Author
- William M. Coughran Jr., Mark R. Pinto, R. Kent Smith
Computation of steady-state CMOS latchup characteristics. [Citation Graph (0, 0)][DBLP] IEEE Trans. on CAD of Integrated Circuits and Systems, 1988, v:7, n:2, pp:307-323 [Journal]
- William M. Coughran Jr., Mark R. Pinto, R. Kent Smith
Adaptive grid generation for VSLI device simulation. [Citation Graph (0, 0)][DBLP] IEEE Trans. on CAD of Integrated Circuits and Systems, 1991, v:10, n:10, pp:1259-1275 [Journal]
- Hiroshi Iwai, Mark R. Pinto, Conor S. Rafferty, J. E. Oristian, Robert W. Dutton
Analysis of Velocity Saturation and Other Effects on Short-Channel MOS Transistor Capacitances. [Citation Graph (0, 0)][DBLP] IEEE Trans. on CAD of Integrated Circuits and Systems, 1987, v:6, n:2, pp:173-184 [Journal]
- Conor S. Rafferty, Mark R. Pinto, Robert W. Dutton
Iterative Methods in Semiconductor Device Simulation. [Citation Graph (0, 0)][DBLP] IEEE Trans. on CAD of Integrated Circuits and Systems, 1985, v:4, n:4, pp:462-471 [Journal]
- Enrico Sangiorgi, Mark R. Pinto, Stanley E. Swirhun, Robert W. Dutton
Two-Dimensional Numerical Analysis of Latchup in a VLSI CMOS Technology. [Citation Graph (0, 0)][DBLP] IEEE Trans. on CAD of Integrated Circuits and Systems, 1985, v:4, n:4, pp:561-574 [Journal]
- Franco Venturi, R. Kent Smith, Enrico Sangiorgi, Mark R. Pinto, Bruno Riccò
A general purpose device simulator coupling Poisson and Monte Carlo transport with applications to deep submicron MOSFETs. [Citation Graph (0, 0)][DBLP] IEEE Trans. on CAD of Integrated Circuits and Systems, 1989, v:8, n:4, pp:360-369 [Journal]
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