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M. Anwarul Hasan :
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Amir K. Daneshbeh , M. Anwarul Hasan A Unidirectional Bit Serial Systolic Architecture for Double-Basis Division over GF(2m). [Citation Graph (0, 0)][DBLP ] IEEE Symposium on Computer Arithmetic, 2003, pp:174-180 [Conf ] M. Anwarul Hasan Efficient Computation of Multiplicative Inverses for Cryptographic Applications. [Citation Graph (0, 0)][DBLP ] IEEE Symposium on Computer Arithmetic, 2001, pp:66-72 [Conf ] Arash Reyhani-Masoleh , M. Anwarul Hasan Low Complexity Sequential Normal Basis Multipliers over GF(2m). [Citation Graph (0, 0)][DBLP ] IEEE Symposium on Computer Arithmetic, 2003, pp:188-195 [Conf ] M. Anwarul Hasan Power Analysis Attacks and Algorithmic Approaches to their Countermeasures for Koblitz Curve Cryptosystems. [Citation Graph (0, 0)][DBLP ] CHES, 2000, pp:93-108 [Conf ] Huapeng Wu , M. Anwarul Hasan , Ian F. Blake Highly Regular Architectures for Finite Field Computation Using Redundant Basis. [Citation Graph (0, 0)][DBLP ] CHES, 1999, pp:269-279 [Conf ] Arash Reyhani-Masoleh , M. Anwarul Hasan Error Detection in Polynomial Basis Multipliers over Binary Extension Fields. [Citation Graph (0, 0)][DBLP ] CHES, 2002, pp:515-528 [Conf ] Arash Reyhani-Masoleh , M. Anwarul Hasan On Low Complexity Bit Parallel Polynomial Basis Multipliers. [Citation Graph (0, 0)][DBLP ] CHES, 2003, pp:189-202 [Conf ] Amr G. Wassal , M. Anwarul Hasan A VLSI Architecture for ATM Algorithm-Agile Encryption. [Citation Graph (0, 0)][DBLP ] Great Lakes Symposium on VLSI, 1999, pp:325-0 [Conf ] Amr G. Wassal , M. Anwarul Hasan , Mohamed I. Elmasry Low-Power Design of Finite Field Multipliers for Wireless Applications. [Citation Graph (0, 0)][DBLP ] Great Lakes Symposium on VLSI, 1998, pp:19-25 [Conf ] M. Anwarul Hasan Look-Up Table Based Large Finite Field Multiplication in Memory Constrained Cryptosystems. [Citation Graph (0, 0)][DBLP ] IMA Int. Conf., 1999, pp:213-221 [Conf ] Arash Reyhani-Masoleh , M. Anwarul Hasan On Efficient Normal Basis Multiplication. [Citation Graph (0, 0)][DBLP ] INDOCRYPT, 2000, pp:213-224 [Conf ] Amir K. Daneshbeh , M. Anwarul Hasan Area Efficient High Speed Elliptic Curve Cryptoprocessor for Random Curves. [Citation Graph (0, 0)][DBLP ] ITCC (2), 2004, pp:588-0 [Conf ] Jonathan Lutz , M. Anwarul Hasan High Performance FPGA based Elliptic Curve Cryptographic Co-Processor. [Citation Graph (0, 0)][DBLP ] ITCC (2), 2004, pp:486-492 [Conf ] Arash Reyhani-Masoleh , M. Anwarul Hasan Fast Normal Basis Multiplication Using General Purpose Processors. [Citation Graph (0, 0)][DBLP ] Selected Areas in Cryptography, 2001, pp:230-244 [Conf ] Amir K. Daneshbeh , M. Anwarul Hasan A Class of Unidirectional Bit Serial Systolic Architectures for Multiplicative Inversion and Division over GF(2m ). [Citation Graph (0, 0)][DBLP ] IEEE Trans. Computers, 2005, v:54, n:3, pp:370-380 [Journal ] M. Anwarul Hasan Look-Up Table-Based Large Finite Field Multiplication in Memory Constrained Cryptosystems. [Citation Graph (0, 0)][DBLP ] IEEE Trans. Computers, 2000, v:49, n:7, pp:749-758 [Journal ] M. Anwarul Hasan Power Analysis Attacks and Algorithmic Approaches to Their Countermeasures for Koblitz Curve Cryptosystems. [Citation Graph (0, 0)][DBLP ] IEEE Trans. Computers, 2001, v:50, n:10, pp:1071-1083 [Journal ] M. Anwarul Hasan Division-and-Accumulation over GF(2'''). [Citation Graph (0, 0)][DBLP ] IEEE Trans. Computers, 1997, v:46, n:6, pp:705-708 [Journal ] M. Anwarul Hasan Double-Basis Multiplicative Inversion Over GF(2m ). [Citation Graph (0, 0)][DBLP ] IEEE Trans. Computers, 1998, v:47, n:9, pp:960-970 [Journal ] M. Anwarul Hasan , Vijay K. Bhargava Bit-Serial Systolic Divider and Multiplier for Finite Fields GF(2^m). [Citation Graph (0, 0)][DBLP ] IEEE Trans. Computers, 1992, v:41, n:8, pp:972-980 [Journal ] M. Anwarul Hasan , Vijay K. Bhargava Architecture for a Low Complexity Rate-Adaptive Reed-Solomon Encoder. [Citation Graph (0, 0)][DBLP ] IEEE Trans. Computers, 1995, v:44, n:7, pp:938-942 [Journal ] M. Anwarul Hasan , Amr G. Wassal VLSI Algorithms, Architectures, and Implementation of a Versatile GF(2m ) Processor. [Citation Graph (0, 0)][DBLP ] IEEE Trans. Computers, 2000, v:49, n:10, pp:1064-1073 [Journal ] M. Anwarul Hasan , Muzhong Wang , Vijay K. Bhargava Modular Construction of Low Complexity Parallel Multipliers for a Class of Finite Fields GF(2^m). [Citation Graph (0, 0)][DBLP ] IEEE Trans. Computers, 1992, v:41, n:8, pp:962-971 [Journal ] M. Anwarul Hasan , Muzhong Wang , Vijay K. Bhargava A Modified Massey-Omura Parallel Multiplier for a Class of Finite Fields. [Citation Graph (0, 0)][DBLP ] IEEE Trans. Computers, 1993, v:42, n:10, pp:1278-1280 [Journal ] Arash Reyhani-Masoleh , M. Anwarul Hasan A New Construction of Massey-Omura Parallel Multiplier over GF (2m ). [Citation Graph (0, 0)][DBLP ] IEEE Trans. Computers, 2002, v:51, n:5, pp:511-520 [Journal ] Arash Reyhani-Masoleh , M. Anwarul Hasan Efficient Multiplication Beyond Optimal Normal Bases. [Citation Graph (0, 0)][DBLP ] IEEE Trans. Computers, 2003, v:52, n:4, pp:428-439 [Journal ] Arash Reyhani-Masoleh , M. Anwarul Hasan Fast Normal Basis Multiplication Using General Purpose Processors. [Citation Graph (0, 0)][DBLP ] IEEE Trans. Computers, 2003, v:52, n:11, pp:1379-1390 [Journal ] Huapeng Wu , M. Anwarul Hasan Efficient Exponentiation of a Primitive Root in GF(2^m). [Citation Graph (0, 0)][DBLP ] IEEE Trans. Computers, 1997, v:46, n:2, pp:162-172 [Journal ] Huapeng Wu , M. Anwarul Hasan Low Complexity Bit-Parallel Multipliers for a Class of Finite Fields. [Citation Graph (0, 0)][DBLP ] IEEE Trans. Computers, 1998, v:47, n:8, pp:883-887 [Journal ] Huapeng Wu , M. Anwarul Hasan Closed-Form Expression for the Average Weight of Signed-Digit Representations. [Citation Graph (0, 0)][DBLP ] IEEE Trans. Computers, 1999, v:48, n:8, pp:848-851 [Journal ] Huapeng Wu , M. Anwarul Hasan , Ian F. Blake New Low-Complexity Bit-Parallel Finite Field Multipliers Using Weakly Dual Bases. [Citation Graph (0, 0)][DBLP ] IEEE Trans. Computers, 1998, v:47, n:11, pp:1223-1234 [Journal ] Huapeng Wu , M. Anwarul Hasan , Ian F. Blake , Shuhong Gao Finite Field Multiplier Using Redundant Representation. [Citation Graph (0, 0)][DBLP ] IEEE Trans. Computers, 2002, v:51, n:11, pp:1306-1316 [Journal ] Search in 0.029secs, Finished in 0.030secs