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Luigi Dadda: [Publications] [Author Rank by year] [Co-authors] [Prefers] [Cites] [Cited by]

Publications of Author

  1. Marco Macchetti, Luigi Dadda
    Quasi-Pipelined Hash Circuits. [Citation Graph (0, 0)][DBLP]
    IEEE Symposium on Computer Arithmetic, 2005, pp:222-229 [Conf]
  2. Luca Breveglieri, Luigi Dadda, Vincenzo Piuri
    Fast Arithmetic and Fault Tolerance in the FERMI System. [Citation Graph (0, 0)][DBLP]
    ASAP, 1997, pp:374-383 [Conf]
  3. Luca Breveglieri, Luigi Dadda, Vincenzo Piuri
    Column Compression Pipelined Multipliers. [Citation Graph (0, 0)][DBLP]
    ASAP, 1995, pp:93-103 [Conf]
  4. Luigi Dadda, Marco Macchetti, Jeff Owen
    The Design of a High Speed ASIC Unit for the Hash Function SHA-256 (384, 512). [Citation Graph (0, 0)][DBLP]
    DATE, 2004, pp:70-75 [Conf]
  5. Luigi Dadda, Vincenzo Piuri
    Fault-Tolerant Modular Convolves. [Citation Graph (0, 0)][DBLP]
    DFT, 1994, pp:37-45 [Conf]
  6. A. Dell'Acqua, M. Hansen, S. Inkinen, B. Lofstedt, J. P. Vanuxem, Christer Svensson, Jiren Yuan, H. Hentzell, L. Del Buono, J. David, J. F. Genat, H. Lebbolo, O. LeDortz, P. Nayman, A. Savoy-Navarro, R. Zitoun, Cesare Alippi, Luca Breveglieri, Luigi Dadda, Vincenzo Piuri, Fabio Salice, Mariagiovanna Sami, Renato Stefanelli, P. Cattaneo, G. Fumagalli, G. Goggi, S. Brigati, Umberto Gatti, Franco Maloberti, Guido Torelli, P. Carlson, A. Kerek, Goran Appelquist, S. Berglund, C. Bohm, Magnus Engström, N. Yamdagni, Rolf Sundblad, I. Höglund, S. T. Persson
    System Level Policies for Fault Tolerance Issues in the FERMI Project. [Citation Graph (0, 0)][DBLP]
    DFT, 1993, pp:1-8 [Conf]
  7. Luigi Dadda, Marco Macchetti, Jeff Owen
    An ASIC design for a high speed implementation of the hash function SHA-256 (384, 512). [Citation Graph (0, 0)][DBLP]
    ACM Great Lakes Symposium on VLSI, 2004, pp:421-425 [Conf]
  8. Luigi Dadda
    A Simplified High Speed Parallel Input Convolver. [Citation Graph (0, 0)][DBLP]
    VLSI Design, 1993, pp:160-165 [Conf]
  9. Luigi Dadda
    Composite Parallel Counters. [Citation Graph (0, 0)][DBLP]
    IEEE Trans. Computers, 1980, v:29, n:10, pp:942-946 [Journal]
  10. Luigi Dadda
    On Serial-Input Multipliers for Two's Complement Numbers. [Citation Graph (0, 0)][DBLP]
    IEEE Trans. Computers, 1989, v:38, n:9, pp:1341-1345 [Journal]
  11. Luigi Dadda, Vincenzo Piuri
    Pipelined Adders. [Citation Graph (0, 0)][DBLP]
    IEEE Trans. Computers, 1996, v:45, n:3, pp:348-356 [Journal]
  12. Luigi Dadda
    Multioperand Parallel Decimal Adder: A Mixed Binary and BCD Approach. [Citation Graph (0, 0)][DBLP]
    IEEE Trans. Computers, 2007, v:56, n:10, pp:1320-1328 [Journal]
  13. Luca Breveglieri, Luigi Dadda
    A VLSI inner product macrocell. [Citation Graph (0, 0)][DBLP]
    IEEE Trans. VLSI Syst., 1998, v:6, n:2, pp:292-298 [Journal]

  14. Multi-parallel convolvers. [Citation Graph (, )][DBLP]


  15. A Memory Unit for Priority Management in IPSec Accelerators. [Citation Graph (, )][DBLP]


  16. A variant of a radix-10 combinational multiplier. [Citation Graph (, )][DBLP]


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