|
Search the dblp DataBase
Thanos Stouraitis:
[Publications]
[Author Rank by year]
[Co-authors]
[Prefers]
[Cites]
[Cited by]
Publications of Author
- Vassilis Paliouras, Thanos Stouraitis
Low-Power Properties of the Logarithmic Number System. [Citation Graph (0, 0)][DBLP] IEEE Symposium on Computer Arithmetic, 2001, pp:229-236 [Conf]
- Vassilis Paliouras, Thanos Stouraitis
Area-time performance of VLSI FIR filter architectures based on residue arithmetic. [Citation Graph (0, 0)][DBLP] EUROMICRO, 1997, pp:576-583 [Conf]
- Vassilis Paliouras, Alexander Skavantzos, Thanos Stouraitis
Multi-voltage low power convolvers using the polynomial residue number system. [Citation Graph (0, 0)][DBLP] ACM Great Lakes Symposium on VLSI, 2002, pp:7-11 [Conf]
- I. Thoidis, Dimitrios Soudris, Ioannis Karafyllidis, Adonios Thanailakis, Thanos Stouraitis
Multiple-Valued Logic Voltage-Mode Storage Circuits Based On True-Single-Phase Clocked Logic. [Citation Graph (0, 0)][DBLP] Great Lakes Symposium on VLSI, 1998, pp:83-88 [Conf]
- Yiannis Andreopoulos, Nikolaos D. Zervas, Gauthier Lafruit, Peter Schelkens, Thanos Stouraitis, Costas E. Goutis, Jan Cornelis
A local wavelet transform implementation versus an optimal row-column algorithm for the 2D multilevel decomposition. [Citation Graph (0, 0)][DBLP] ICIP (3), 2001, pp:330-333 [Conf]
- Chrissavgi Dre, Anna Tatsaki, Thanos Stouraitis, Constantinos E. Goutis
Alternative Architectures for the 2-D DCT Algorithm. [Citation Graph (0, 0)][DBLP] ISCAS, 1995, pp:2156-2159 [Conf]
- E. Fotopoulou, Vassilis Paliouras, Thanos Stouraitis
A computational technique and a VLSI architecture for digital pulse shaping in OFDM modems. [Citation Graph (0, 0)][DBLP] ISCAS (2), 2003, pp:125-128 [Conf]
- Seon Wook Kim, Thanos Stouraitis, Alexander Skavantzos
Full Adder-based Inner Product Step Processors for Residue and Quadratic Residue Number Systems. [Citation Graph (0, 0)][DBLP] ISCAS, 1993, pp:1821-1824 [Conf]
- I. Orginos, Vassilis Paliouras, Thanos Stouraitis
A Novel Algorithm for Multi-Operand Logarithmic Number System Addition and Subtraction Using Polynominal Approximation. [Citation Graph (0, 0)][DBLP] ISCAS, 1995, pp:1992-1995 [Conf]
- Vassilis Paliouras, Thanos Stouraitis
Systematic Design of Multi-Modulus/Multi-Function Residue Number System Processors. [Citation Graph (0, 0)][DBLP] ISCAS, 1994, pp:79-82 [Conf]
- Vassilis Paliouras, Dimitrios Soudris, Thanos Stouraitis
Methodology for the Design of Signed-digit DSP Processors. [Citation Graph (0, 0)][DBLP] ISCAS, 1993, pp:1833-1836 [Conf]
- Vassilis Paliouras, Thanos Stouraitis
Signal activity and power consumption reduction using the logarithmic number system. [Citation Graph (0, 0)][DBLP] ISCAS (2), 2001, pp:653-656 [Conf]
- Konstantina Karagianni, Thanos Stouraitis
A vector processor for 3-D geometrical transformations. [Citation Graph (0, 0)][DBLP] ISCAS (4), 2001, pp:482-485 [Conf]
- M. Perakis, A. E. Tzimas, E. G. Metaxakis, Dimitrios Soudris, G. A. Kalivas, C. Katis, Chrissavgi Dre, Constantinos E. Goutis, Adonios Thanailakis, Thanos Stouraitis
The VLSI implementation of a baseband receiver for DECT-based portable applications. [Citation Graph (0, 0)][DBLP] ISCAS (1), 1999, pp:198-201 [Conf]
- George Theodoridis, S. Theoharis, Dimitrios Soudris, Thanos Stouraitis, Constantinos E. Goutis
An efficient probabilistic method for logic circuits using real delay gate model. [Citation Graph (0, 0)][DBLP] ISCAS (1), 1999, pp:286-289 [Conf]
- Vassilis Paliouras, Thanos Stouraitis
Novel high-radix residue number system multipliers and adders. [Citation Graph (0, 0)][DBLP] ISCAS (1), 1999, pp:451-454 [Conf]
- Alexander Skavantzos, Thanos Stouraitis
Grouped-moduli residue number systems for fast signal processing. [Citation Graph (0, 0)][DBLP] ISCAS (3), 1999, pp:478-483 [Conf]
- Kostas Masselos, Panagiotis Merakos, Thanos Stouraitis, Constantinos E. Goutis
Low power synthesis of sum-of-product computation in DSP algorithms. [Citation Graph (0, 0)][DBLP] ISCAS (6), 1999, pp:420-423 [Conf]
- G. Sinevriotis, Thanos Stouraitis
A novel list-scheduling algorithm for the low-energy program execution. [Citation Graph (0, 0)][DBLP] ISCAS (4), 2002, pp:97-100 [Conf]
- D. Zografos, Konstantina Karagianni, Thanos Stouraitis
VLSI architectures for the implementation of the Wigner distribution. [Citation Graph (0, 0)][DBLP] ISCAS (4), 2002, pp:882-885 [Conf]
- Kostas Masselos, S. Theoharis, Panagiotis Merakos, Thanos Stouraitis, Constantinos E. Goutis
Low power synthesis of sum-of-products computation (poster session). [Citation Graph (0, 0)][DBLP] ISLPED, 2000, pp:234-237 [Conf]
- Vassilis Paliouras, Thanos Stouraitis
Logarithmic Number System for Low-Power Arithmetic. [Citation Graph (0, 0)][DBLP] PATMOS, 2000, pp:285-294 [Conf]
- Konstantina Karagianni, Vassilis Paliouras, George Diamantakos, Thanos Stouraitis
Operation-Saving VLSI Architectures for 3D Geometrical Transformations. [Citation Graph (0, 0)][DBLP] IEEE Trans. Computers, 2001, v:50, n:6, pp:609-622 [Journal]
- Alexander Skavantzos, Thanos Stouraitis
Decomposition of Complex Multipliers Using Polynomial Encoding. [Citation Graph (0, 0)][DBLP] IEEE Trans. Computers, 1992, v:41, n:10, pp:1331-1333 [Journal]
- Thanos Stouraitis
Borrow: A Fault-Tolerance Scheme for Wavefront Array Processors. [Citation Graph (0, 0)][DBLP] IEEE Trans. Computers, 1993, v:42, n:10, pp:1257-1261 [Journal]
- Fred J. Taylor, G. Papadourakis, Alexander Skavantzos, Thanos Stouraitis
A Radix-4FFT Using Complex RNS Arithmetic. [Citation Graph (0, 0)][DBLP] IEEE Trans. Computers, 1985, v:34, n:6, pp:573-576 [Journal]
- Dionisis Athanasopoulos, Thanos Stouraitis
Content-Adaptive Wavelet-Based Scalable Video Coding. [Citation Graph (0, 0)][DBLP] ISCAS, 2007, pp:981-984 [Conf]
- Kostas Masselos, Yiannis Andreopoulos, Thanos Stouraitis
Execution time comparison of lifting-based 2D wavelet transforms implementations on a VLIW DSP. [Citation Graph (0, 0)][DBLP] ISCAS, 2006, pp:- [Conf]
- Dimitrios M. Schinianakis, Apostolos P. Fournaris, Athanasios Kakarountas, Thanos Stouraitis
An RNS architecture of an Fp elliptic curve point multiplier. [Citation Graph (0, 0)][DBLP] ISCAS, 2006, pp:- [Conf]
- Kostas Masselos, Panagiotis Merakos, Thanos Stouraitis, Constantinos E. Goutis
Novel techniques for bus power consumption reduction in realizations of sum-of-product computation. [Citation Graph (0, 0)][DBLP] IEEE Trans. VLSI Syst., 1999, v:7, n:4, pp:492-497 [Journal]
- Kostas Masselos, Panagiotis Merakos, S. Theoharis, Thanos Stouraitis, Constantinos E. Goutis
Power efficient data path synthesis of sum-of-products computations. [Citation Graph (0, 0)][DBLP] IEEE Trans. VLSI Syst., 2003, v:11, n:3, pp:446-450 [Journal]
- Uwe Meyer-Bäse, Thanos Stouraitis
New power-of-2 RNS scaling scheme for cell-based IC design. [Citation Graph (0, 0)][DBLP] IEEE Trans. VLSI Syst., 2003, v:11, n:2, pp:280-283 [Journal]
Adaptive mapping to resource availability for dynamic wavelet-based applications. [Citation Graph (, )][DBLP]
Analysis and design of a WLAN OFDM transmitter with digital filters. [Citation Graph (, )][DBLP]
Software-Controlled Scratchpad Mapping Strategies for Wavelet-Based Applications. [Citation Graph (, )][DBLP]
Search in 0.062secs, Finished in 0.063secs
|