The SCEAS System
Navigation Menu

Search the dblp DataBase

Title:
Author:

William C. Athas: [Publications] [Author Rank by year] [Co-authors] [Prefers] [Cites] [Cited by]

Publications of Author

  1. William C. Athas, Charles L. Seitz
    Multicomputers: Message-Passing Concurrent Computers. [Citation Graph (1, 0)][DBLP]
    IEEE Computer, 1988, v:21, n:8, pp:9-24 [Journal]
  2. William C. Athas, Nestoras Tzartzanis
    Energy recovery for low-power CMOS. [Citation Graph (0, 0)][DBLP]
    ARVLSI, 1995, pp:415-429 [Conf]
  3. Nestoras Tzartzanis, William C. Athas
    Clock-Powered CMOS: A Hybrid Adiabatic Logic Style for Energy-Efficient Computing. [Citation Graph (0, 0)][DBLP]
    ARVLSI, 1999, pp:137-153 [Conf]
  4. Nestoras Tzartzanis, William C. Athas
    Design and analysis of a low-power energy-recovery adder. [Citation Graph (0, 0)][DBLP]
    Great Lakes Symposium on VLSI, 1995, pp:66-69 [Conf]
  5. John Bunda, Donald S. Fussell, William C. Athas
    Energy-efficient instruction set architecture for CMOS microprocessors. [Citation Graph (0, 0)][DBLP]
    HICSS (1), 1995, pp:298-305 [Conf]
  6. John Bunda, Donald S. Fussell, Roy M. Jenevein, William C. Athas
    16-Bit vs. 32-Bit Instructions for Pipelined Microprocessors. [Citation Graph (0, 0)][DBLP]
    ISCA, 1993, pp:237-246 [Conf]
  7. William C. Athas
    Practical considerations of clock-powered logic. [Citation Graph (0, 0)][DBLP]
    ISLPED, 2000, pp:173-178 [Conf]
  8. William C. Athas, W.-C. Liu, Lars J. Svensson
    Energy-recovery CMOS for highly pipelined DSP designs. [Citation Graph (0, 0)][DBLP]
    ISLPED, 1996, pp:101-104 [Conf]
  9. William C. Athas, Nestoras Tzartzanis, Lars J. Svensson, Lena Peterson, Huimin Li, Xing Yu Jiang, Peiqing Wang, W.-C. Liu
    AC-1: a clock-powered microprocessor. [Citation Graph (0, 0)][DBLP]
    ISLPED, 1997, pp:328-333 [Conf]
  10. William C. Athas, Lynn Youngs, Andrew Reinhart
    Compact models for estimating microprocessor frequency and power. [Citation Graph (0, 0)][DBLP]
    ISLPED, 2002, pp:313-318 [Conf]
  11. Joong-Seok Moon, William C. Athas, Peter A. Beerel
    Theory and practical implementation of harmonic resonant rail driver. [Citation Graph (0, 0)][DBLP]
    ISLPED, 2001, pp:153-158 [Conf]
  12. Nestoras Tzartzanis, William C. Athas
    Energy recovery for the design of high-speed, low-power static RAMs. [Citation Graph (0, 0)][DBLP]
    ISLPED, 1996, pp:55-60 [Conf]
  13. Nestoras Tzartzanis, William C. Athas
    Retractile clock-powered logic. [Citation Graph (0, 0)][DBLP]
    ISLPED, 1999, pp:18-23 [Conf]
  14. William C. Athas, Nanette J. Boden
    Cantor: an actor programming system for scientific computing. [Citation Graph (0, 0)][DBLP]
    SIGPLAN Notices, 1989, v:24, n:4, pp:66-68 [Journal]
  15. William C. Athas, Lars J. Svensson, J. G. Koller, Nestoras Tzartzanis, E. Ying-Chin Chou
    Low-power digital systems based on adiabatic-switching principles. [Citation Graph (0, 0)][DBLP]
    IEEE Trans. VLSI Syst., 1994, v:2, n:4, pp:398-407 [Journal]
  16. Joong-Seok Moon, William C. Athas, Sigfrid D. Soli, Jeffrey T. Draper, Peter A. Beerel
    Voltage-pulse driven harmonic resonant rail drivers for low-power applications. [Citation Graph (0, 0)][DBLP]
    IEEE Trans. VLSI Syst., 2003, v:11, n:5, pp:762-777 [Journal]

  17. The M-cache: a message-retrieving mechanism for multicomputer systems. [Citation Graph (, )][DBLP]


Search in 0.381secs, Finished in 0.382secs
NOTICE1
System may not be available sometimes or not working properly, since it is still in development with continuous upgrades
NOTICE2
The rankings that are presented on this page should NOT be considered as formal since the citation info is incomplete in DBLP
 
System created by asidirop@csd.auth.gr [http://users.auth.gr/~asidirop/] © 2002
for Data Engineering Laboratory, Department of Informatics, Aristotle University © 2002