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## Search the dblp DataBase
Jacob White:
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## Publications of Author- X. Cai, Keith Nabors, Jacob White
**Efficient Galerkin techniques for multipole-accelerated capacitance extraction of 3-D structures with multiple dielectrics.**[Citation Graph (0, 0)][DBLP] ARVLSI, 1995, pp:200-213 [Conf] - Jacob White
**Developing design tools for biological and biomedical applications of micro- and nano-technology.**[Citation Graph (0, 0)][DBLP] CODES+ISSS, 2005, pp:196-200 [Conf] - Mike Chou, Tom Korsmeyer, Jacob White
**Transient Simulations of Three-Dimensional Integrated Circuit Interconnect Using a Mixed Surface-Volume Approach.**[Citation Graph (0, 0)][DBLP] DAC, 1995, pp:485-490 [Conf] - Mike Chou, Jacob White
**Multilevel Integral Equation Methods for the Extraction of Substrate Coupling Parameters in Mixed-Signal IC's.**[Citation Graph (0, 0)][DBLP] DAC, 1998, pp:20-25 [Conf] - Luca Daniel, Alberto L. Sangiovanni-Vincentelli, Jacob White
**Using Conduction Modes Basis Functions for Efficient Electromagnetic Analysis of On-Chip and Off-Chip Interconnect.**[Citation Graph (0, 0)][DBLP] DAC, 2001, pp:563-566 [Conf] - Dan Feng, Joel R. Phillips, Keith Nabors, Kenneth S. Kundert, Jacob White
**Efficient Computation of Quasi-Periodic Circuit Operating Conditions via a Mixed Frequency/Time Approach.**[Citation Graph (0, 0)][DBLP] DAC, 1999, pp:635-640 [Conf] - Abhijit Ghosh, Srinivas Devadas, Kurt Keutzer, Jacob White
**Estimation of Average Switching Activity in Combinational and Sequential Circuits.**[Citation Graph (0, 0)][DBLP] DAC, 1992, pp:253-259 [Conf] - Xin Hu, Jung Hoon Lee, Jacob White, Luca Daniel
**Analysis of full-wave conductor system impedance over substrate using novel integration techniques.**[Citation Graph (0, 0)][DBLP] DAC, 2005, pp:147-152 [Conf] - Mattan Kamon, Nuno Alexandre Marques, Yehia Massoud, Luis Miguel Silveira, Jacob White
**Interconnect Analysis: From 3-D Structures to Circuit Models.**[Citation Graph (0, 0)][DBLP] DAC, 1999, pp:910-914 [Conf] - Mattan Kamon, Michael J. Tsuk, Jacob White
**FastHenry: A Multipole-Accelerated 3-D Inductance Extraction Program.**[Citation Graph (0, 0)][DBLP] DAC, 1993, pp:678-683 [Conf] - Joe Kanapka, Joel R. Phillips, Jacob White
**Fast methods for extraction and sparsification of substrate coupling.**[Citation Graph (0, 0)][DBLP] DAC, 2000, pp:738-743 [Conf] - H. Levy, W. Scott, Don MacMillen, Jacob White
**A rank-one update method for efficient processing of interconnect parasitics in timing analysis.**[Citation Graph (0, 0)][DBLP] DAC, 2000, pp:75-78 [Conf] - Jing-Rebecca Li, Frank Wang, Jacob White
**An Efficient Lyapunov Equation-Based Approach for Generating Reduced-Order Models of Interconnect.**[Citation Graph (0, 0)][DBLP] DAC, 1999, pp:1-6 [Conf] - Nuno Alexandre Marques, Mattan Kamon, Jacob White, Luis Miguel Silveira
**A Mixed Nodal-Mesh Formulation for Efficient Extraction and Passive Reduced-Order Modeling of 3D Interconnects.**[Citation Graph (0, 0)][DBLP] DAC, 1998, pp:297-302 [Conf] - Yehia Massoud, Jamil Kawa, Don MacMillen, Jacob White
**Modeling and Analysis of Differential Signaling for Minimizing Inductive Cross-Talk.**[Citation Graph (0, 0)][DBLP] DAC, 2001, pp:804-809 [Conf] - Yehia Massoud, Steve S. Majors, Tareq Bustami, Jacob White
**Layout Techniques for Minimizing On-Chip Interconnect Self Inductance.**[Citation Graph (0, 0)][DBLP] DAC, 1998, pp:566-571 [Conf] - Yehia Massoud, Jacob White
**Improving the generality of the fictitious magnetic charge approach to computing inductances in the presence of permeable materials.**[Citation Graph (0, 0)][DBLP] DAC, 2002, pp:552-555 [Conf] - Keith Nabors, Jacob White
**Multipole-Accelerated 3-D Capacitance Extraction Algorithms for Structures with Conformal Dielectrics.**[Citation Graph (0, 0)][DBLP] DAC, 1992, pp:710-715 [Conf] - Ognen J. Nastov, Jacob White
**Time-Mapped Harmonic Balance.**[Citation Graph (0, 0)][DBLP] DAC, 1999, pp:641-646 [Conf] - Luis Miguel Silveira, Ibrahim M. Elfadel, Jacob White, Moni Chilukuri, Kenneth S. Kundert
**An Efficient Approach to Transmission Line Simulation Using Measured or Tabulated S-parameter Data.**[Citation Graph (0, 0)][DBLP] DAC, 1994, pp:634-639 [Conf] - Luis Miguel Silveira, Mattan Kamon, Jacob White
**Efficient Reduced-Order Modeling of Frequency-Dependent Coupling Inductances Associated with 3-D Interconnect Structures.**[Citation Graph (0, 0)][DBLP] DAC, 1995, pp:376-380 [Conf] - Ricardo Telichevesky, Kenneth S. Kundert, Jacob White
**Efficient Steady-State Analysis Based on Matrix-Free Krylov-Subspace Methods.**[Citation Graph (0, 0)][DBLP] DAC, 1995, pp:480-484 [Conf] - Ricardo Telichevesky, Kenneth S. Kundert, Jacob White
**Efficient AC and Noise Analysis of Two-Tone RF Circuits.**[Citation Graph (0, 0)][DBLP] DAC, 1996, pp:292-297 [Conf] - Dmitry Vasilyev, Michal Rewienski, Jacob White
**A TBR-based trajectory piecewise-linear algorithm for generating accurate low-order models for nonlinear analog circuits and MEMS.**[Citation Graph (0, 0)][DBLP] DAC, 2003, pp:490-495 [Conf] - Jacob White
**CAD challenges in BioMEMS design.**[Citation Graph (0, 0)][DBLP] DAC, 2004, pp:629-632 [Conf] - Zhenhai Zhu, Ben Song, Jacob White
**Algorithms in FastImp: a fast and wideband impedance extraction program for complicated 3-D geometries.**[Citation Graph (0, 0)][DBLP] DAC, 2003, pp:712-717 [Conf] - Nuno Alexandre Marques, Mattan Kamon, Jacob White, Luis Miguel Silveira
**An Efficient Algorithm for Fast Parasitic Extraction and Passive Order Reduction of 3D Interconnect Models.**[Citation Graph (0, 0)][DBLP] DATE, 1998, pp:538-543 [Conf] - Luca Daniel, Alberto L. Sangiovanni-Vincentelli, Jacob White
**Techniques for Including Dielectrics when Extracting Passive Low-Order Models of High Speed Interconnect.**[Citation Graph (0, 0)][DBLP] ICCAD, 2001, pp:240-244 [Conf] - Luca Daniel, Alberto L. Sangiovanni-Vincentelli, Jacob White
**Proximity templates for modeling of skin and proximity effects on packages and high frequency interconnect.**[Citation Graph (0, 0)][DBLP] ICCAD, 2002, pp:326-333 [Conf] - Mattan Kamon, Nuno Alexandre Marques, Jacob White
**FastPep: a fast parasitic extraction program for complex three-dimensional geometries.**[Citation Graph (0, 0)][DBLP] ICCAD, 1997, pp:456-460 [Conf] - Mattan Kamon, Michael J. Tsuk, C. Smithhisler, Jacob White
**Efficient techniques for inductance extraction of complex 3-D geometries.**[Citation Graph (0, 0)][DBLP] ICCAD, 1992, pp:438-442 [Conf] - Joe Kanapka, Jacob White
**Highly Accurate Fast Methods for Extraction and Sparsification of Substrate Coupling Based on Low-Rank Approximation.**[Citation Graph (0, 0)][DBLP] ICCAD, 2001, pp:417-423 [Conf] - Jing-Rebecca Li, Jacob White
**Efficient model reduction of interconnect via approximate system gramians.**[Citation Graph (0, 0)][DBLP] ICCAD, 1999, pp:380-384 [Conf] - Andrew Lumsdaine, Mark W. Reichelt, Jacob White
**Conjugate Direction Waveform Methods for Transient Two-Dimensional Simulation for MOS Devices.**[Citation Graph (0, 0)][DBLP] ICCAD, 1991, pp:116-119 [Conf] - Yehia Massoud, Jacob White
**FastMag: a 3-D magnetostatic inductance extraction program for structures with permeable materials.**[Citation Graph (0, 0)][DBLP] ICCAD, 2002, pp:478-484 [Conf] - Michal Rewienski, Jacob White
**A Trajectory Piecewise-Linear Approach to Model Order Reduction and Fast Simulation of Nonlinear Circuits and Micromachined Devices.**[Citation Graph (0, 0)][DBLP] ICCAD, 2001, pp:252-0 [Conf] - Luis Miguel Silveira, Mattan Kamon, Ibrahim M. Elfadel, Jacob White
**A coordinate-transformed Arnoldi algorithm for generating guaranteed stable reduced-order models of RLC circuits.**[Citation Graph (0, 0)][DBLP] ICCAD, 1996, pp:288-294 [Conf] - Luis Miguel Silveira, Andrew Lumsdaine, Jacob White
**Parallel Simulation Algorithms for Grid-Based Analog Signal Processors.**[Citation Graph (0, 0)][DBLP] ICCAD, 1990, pp:442-445 [Conf] - Luis Miguel Silveira, Jacob White, Steven Leeb
**A Modified Envelope-Following Approach to Clocked Analog Circuit Simulation.**[Citation Graph (0, 0)][DBLP] ICCAD, 1991, pp:20-23 [Conf] - Ben Song, Zhenhai Zhu, John D. Rockway, Jacob White
**A New Surface Integral Formulation For Wideband Impedance Extraction of 3-D Structures.**[Citation Graph (0, 0)][DBLP] ICCAD, 2003, pp:843-847 [Conf] - Jacob White, Jacob Avidan, Abe Elfadel, D. F. Wong
**Advances in transistor timing, simulation, and optimization (tutorial abstract).**[Citation Graph (0, 0)][DBLP] ICCAD, 1999, pp:611- [Conf] - Jacob White, Gary K. Fedder, Tamal Mukherjee
**Path toward future CAD environments for MEMS (tutorial abstract).**[Citation Graph (0, 0)][DBLP] ICCAD, 1999, pp:606- [Conf] - Zhenhai Zhu, Jingfang Huang, Ben Song, Jacob White
**Improving the Robustness of a Surface Integral Formulation for Wideband Impendance Extraction of 3D Structures.**[Citation Graph (0, 0)][DBLP] ICCAD, 2001, pp:592-597 [Conf] - Zhenhai Zhu, Jacob White, Alper Demir
**A stochastic integral equation method for modeling the rough surface effect on interconnect capacitance.**[Citation Graph (0, 0)][DBLP] ICCAD, 2004, pp:887-891 [Conf] - Shih-Hsien Kuo, Jacob White
**A spectrally accurate integral equation solver for molecular surface electrostatics.**[Citation Graph (0, 0)][DBLP] ICCAD, 2006, pp:899-906 [Conf] - Keith Nabors, S. Kim, Jacob White, Stephen D. Senturia
**Fast Capacitance Extraction of General Three-Dimensional Structures.**[Citation Graph (0, 0)][DBLP] ICCD, 1991, pp:479-484 [Conf] - Luca Daniel, Chin Siong Ong, Sok Chay Low, Kwok Hong Lee, Jacob White
**Geometrically parameterized interconnect performance models for interconnect synthesis.**[Citation Graph (0, 0)][DBLP] ISPD, 2002, pp:202-207 [Conf] - Mark W. Reichelt, F. Odeh, Jacob White
**A-Stability of Multirate Integration Methods, with Application to Parallel Semiconductor Device Simulation.**[Citation Graph (0, 0)][DBLP] PPSC, 1993, pp:246-253 [Conf] - Dmitry Vasilyev, Michal Rewienski, Jacob White
**Macromodel Generation for BioMEMS Components Using a Stabilized Balanced Truncation Plus Trajectory Piecewise-Linear Approach.**[Citation Graph (0, 0)][DBLP] IEEE Trans. on CAD of Integrated Circuits and Systems, 2006, v:25, n:2, pp:285-293 [Journal] - Xin Wang, Joe Kanapka, Wenjing Ye, Narayan R. Aluru, Jacob White
**Algorithms in FastStokes and Its Application to Micromachined Device Simulation.**[Citation Graph (0, 0)][DBLP] IEEE Trans. on CAD of Integrated Circuits and Systems, 2006, v:25, n:2, pp:248-257 [Journal] **Design tools for emerging technologies.**[Citation Graph (, )][DBLP]**An electrical-level superposed-edge approach to statistical serial link simulation.**[Citation Graph (, )][DBLP]**Second-kind integral formulations of the capacitance problem.**[Citation Graph (, )][DBLP]
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