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Kenneth Y. Yun: [Publications] [Author Rank by year] [Co-authors] [Prefers] [Cites] [Cited by]

Publications of Author

  1. Ayoob E. Dooply, Kenneth Y. Yun
    Optimal Clocking and Enhanced Testability for High-Performance Self-Resetting Domino Pipelines. [Citation Graph (0, 0)][DBLP]
    ARVLSI, 1999, pp:200-214 [Conf]
  2. Kenneth Y. Yun
    Recent Advances in Asynchronous Design Methodologies. [Citation Graph (0, 0)][DBLP]
    ASP-DAC, 1999, pp:253-0 [Conf]
  3. Kenneth Y. Yun, Ayoob E. Dooply
    Optimal Evaluation Clocking of Self-Resetting Domino Pipelines. [Citation Graph (0, 0)][DBLP]
    ASP-DAC, 1999, pp:121-124 [Conf]
  4. Kevin W. James, Kenneth Y. Yun
    Average-Case Optimized Transistor-Level Technology Mapping of Extended Burst-Mode Circuits. [Citation Graph (0, 0)][DBLP]
    ASYNC, 1998, pp:70-79 [Conf]
  5. Supratik Chakraborty, David L. Dill, Kun-Yung Chang, Kenneth Y. Yun
    Timing Analysis of Extended Burst-Mode Circuits. [Citation Graph (0, 0)][DBLP]
    ASYNC, 1997, pp:101-111 [Conf]
  6. Wei-Chun Chou, Peter A. Beerel, Ran Ginosar, Rakefet Kol, Chris J. Myers, Shai Rotem, Ken S. Stevens, Kenneth Y. Yun
    Average-Case Optimized Technology Mapping of One-Hot Domino CircuitsAverage-Case Optimized Transistor-Level Technology Mapping of Extended Burst-Mode Circuits. [Citation Graph (0, 0)][DBLP]
    ASYNC, 1998, pp:80-0 [Conf]
  7. Steven M. Nowick, Kenneth Y. Yun, Ayoob E. Dooply, Peter A. Beerel
    Speculative Completion for the Design of High-Performance Asynchronous Dynamic Adders. [Citation Graph (0, 0)][DBLP]
    ASYNC, 1997, pp:210-0 [Conf]
  8. Kenneth Y. Yun, Ayoob E. Dooply, Julio Arceo, Peter A. Beerel, Vida Vakilotojar
    The Design and Verification of A High-Performance Low-Control-Overhead Asynchronous Differential Equation Solver. [Citation Graph (0, 0)][DBLP]
    ASYNC, 1997, pp:140-0 [Conf]
  9. Shai Rotem, Ken S. Stevens, Charles Dike, Marly Roncken, Boris Agapiev, Ran Ginosar, Rakefet Kol, Peter A. Beerel, Chris J. Myers, Kenneth Y. Yun
    RAPPID: An Asynchronous Instruction Length Decoder. [Citation Graph (0, 0)][DBLP]
    ASYNC, 1999, pp:60-70 [Conf]
  10. Erik Brunvand, Steven M. Nowick, Kenneth Y. Yun
    Practical Advances in Asynchronous Design and in Asynchronous/Synchronous Interfaces. [Citation Graph (0, 0)][DBLP]
    DAC, 1999, pp:104-109 [Conf]
  11. Peter A. Beerel, Kenneth Y. Yun, Steven M. Nowick, Pei-Chuan Yeh
    Estimation and bounding of energy consumption in burst-mode control circuits. [Citation Graph (0, 0)][DBLP]
    ICCAD, 1995, pp:26-33 [Conf]
  12. Kenneth Y. Yun, David L. Dill
    Automatic synthesis of 3D asynchronous state machines. [Citation Graph (0, 0)][DBLP]
    ICCAD, 1992, pp:576-580 [Conf]
  13. Kenneth Y. Yun, David L. Dill
    Unifying synchronous/asynchronous state machine synthesis. [Citation Graph (0, 0)][DBLP]
    ICCAD, 1993, pp:255-260 [Conf]
  14. Kenneth Y. Yun, Bill Lin, David L. Dill, Srinivas Devadas
    Performance-driven synthesis of asynchronous controllers. [Citation Graph (0, 0)][DBLP]
    ICCAD, 1994, pp:550-557 [Conf]
  15. Erik Brunvand, Steven M. Nowick, Kenneth Y. Yun
    Practical Advances in Asynchronous Design. [Citation Graph (0, 0)][DBLP]
    ICCD, 1997, pp:662-668 [Conf]
  16. Steven M. Nowick, Kenneth Y. Yun, David L. Dill
    Practical Asynchronous Controller Design. [Citation Graph (0, 0)][DBLP]
    ICCD, 1992, pp:341-345 [Conf]
  17. Kenneth Y. Yun, David L. Dill
    A high-performance asynchronous SCSI controller. [Citation Graph (0, 0)][DBLP]
    ICCD, 1995, pp:44-0 [Conf]
  18. Kenneth Y. Yun, Ryan P. Donohue
    Pausible Clocking: A First Step Toward Heterogeneous Systems. [Citation Graph (0, 0)][DBLP]
    ICCD, 1996, pp:118-0 [Conf]
  19. Kenneth Y. Yun, David L. Dill, Steven M. Nowick
    Synthesis of 3D Asynchronous State Machines. [Citation Graph (0, 0)][DBLP]
    ICCD, 1992, pp:346-350 [Conf]
  20. Sushil K. Singh, Viet L. Do, Kevin W. James, Kenneth Y. Yun, Rene L. Cruz, Manish Amde
    QoS Enabled Broadband Access Through Optical Rings. [Citation Graph (0, 0)][DBLP]
    LCN, 2004, pp:421-422 [Conf]
  21. Kenneth Y. Yun
    A Terabit Multiservice Switch. [Citation Graph (0, 0)][DBLP]
    IEEE Micro, 2001, v:21, n:1, pp:58-70 [Journal]
  22. Supratik Chakraborty, Kenneth Y. Yun, David L. Dill
    Timing analysis of asynchronous systems using time separation of events. [Citation Graph (0, 0)][DBLP]
    IEEE Trans. on CAD of Integrated Circuits and Systems, 1999, v:18, n:8, pp:1061-1076 [Journal]
  23. Wei-Chun Chou, Peter A. Beerel, Kenneth Y. Yun
    Average-case technology mapping of asynchronous burst-mode circuits. [Citation Graph (0, 0)][DBLP]
    IEEE Trans. on CAD of Integrated Circuits and Systems, 1999, v:18, n:10, pp:1418-1434 [Journal]
  24. Kenneth Y. Yun, David L. Dill
    Automatic synthesis of extended burst-mode circuits. I.(Specification and hazard-free implementations). [Citation Graph (0, 0)][DBLP]
    IEEE Trans. on CAD of Integrated Circuits and Systems, 1999, v:18, n:2, pp:101-117 [Journal]
  25. Kenneth Y. Yun, David L. Dill
    Automatic synthesis of extended burst-mode circuits. II. (Automaticsynthesis). [Citation Graph (0, 0)][DBLP]
    IEEE Trans. on CAD of Integrated Circuits and Systems, 1999, v:18, n:2, pp:118-132 [Journal]
  26. Kenneth Y. Yun, Bill Lin, David L. Dill, Srinivas Devadas
    BDD-based synthesis of extended burst-mode controllers. [Citation Graph (0, 0)][DBLP]
    IEEE Trans. on CAD of Integrated Circuits and Systems, 1998, v:17, n:9, pp:782-792 [Journal]
  27. Kenneth Y. Yun, Ayoob E. Dooply
    Pausible clocking-based heterogeneous systems. [Citation Graph (0, 0)][DBLP]
    IEEE Trans. VLSI Syst., 1999, v:7, n:4, pp:482-488 [Journal]
  28. Kenneth Y. Yun, Peter A. Beerel, Vida Vakilotojar, Ayoob E. Dooply, Julio Arceo
    The design and verification of a high-performance low-control-overhead asynchronous differential equation solver. [Citation Graph (0, 0)][DBLP]
    IEEE Trans. VLSI Syst., 1998, v:6, n:4, pp:643-655 [Journal]
  29. Kenneth Y. Yun, Kevin W. James, R. H. Fairlie-Cuninghame, Supratik Chakraborty, Rene L. Cruz
    A self-timed real-time sorting network. [Citation Graph (0, 0)][DBLP]
    IEEE Trans. VLSI Syst., 2000, v:8, n:3, pp:356-363 [Journal]

  30. A low SINR synchronization system for direct-sequence spread-spectrum communications: radio prototype, verification testbed and experimental results. [Citation Graph (, )][DBLP]


  31. Synchronization at Low SINR in Asynchronous Direct-Sequence Spread-Spectrum Communications. [Citation Graph (, )][DBLP]


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