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Ching-Wei Yeh: [Publications] [Author Rank by year] [Co-authors] [Prefers] [Cites] [Cited by]

Publications of Author

  1. Ching-Wei Yeh, Chung-Kuan Cheng, Ting-Ting Y. Lin
    A General Purpose Multiple Way Partitioning Algorithm. [Citation Graph (2, 0)][DBLP]
    DAC, 1991, pp:421-426 [Conf]
  2. Ching-Wei Yeh, Min-Cheng Chang, Yin-Shuin Kang
    Algorithms Promoting the Use of Dual Supply Voltages for Power-Driven Designs. [Citation Graph (0, 0)][DBLP]
    ARVLSI, 1999, pp:155-169 [Conf]
  3. Ching-Wei Yeh, Chin-Chao Chang, Jinn-Shyan Wang
    Technnology Mapping for Low Power. [Citation Graph (0, 0)][DBLP]
    ASP-DAC, 1999, pp:145-148 [Conf]
  4. Ching-Wei Yeh, Min-Cheng Chang, Shih-Chieh Chang, Wen-Ben Jone
    Gate-Level Design Exploiting Dual Supply Voltages for Power-Driven Applications. [Citation Graph (0, 0)][DBLP]
    DAC, 1999, pp:68-71 [Conf]
  5. Ching-Wei Yeh, Yin-Shuin Kang, Shan-Jih Shieh, Jinn-Shyan Wang
    Layout Techniques Supporting the Use of Dual Supply Voltages for Cell-based Designs. [Citation Graph (0, 0)][DBLP]
    DAC, 1999, pp:62-67 [Conf]
  6. Ching-Wei Yeh, Chung-Kuan Cheng, Ting-Ting Y. Lin
    A probabilistic multicommodity-flow solution to circuit clustering problems. [Citation Graph (0, 0)][DBLP]
    ICCAD, 1992, pp:428-431 [Conf]
  7. Kuan-Hung Chen, Jiun-In Guo, Jinn-Shyan Wang, Ching-Wei Yeh
    A power-aware SNR-progressive DCT/IDCT IP core design for multimedia transform coding. [Citation Graph (0, 0)][DBLP]
    ICME, 2004, pp:1683-1686 [Conf]
  8. Kuan-Hung Chen, Jiun-In Guo, Jinn-Shyan Wang, Ching-Wei Yeh, Tien-Fu Chen
    A power-aware IP core design for the variable-length DCT/IDCT targeting at MPEG4 shape-adaptive transforms. [Citation Graph (0, 0)][DBLP]
    ISCAS (2), 2004, pp:141-144 [Conf]
  9. Jinn-Shyan Wang, Shang-Jyh Shieh, Ching-Wei Yeh, Yuan-Hsun Yeh
    Pseudo-footless CMOS domino logic circuits for high-performance VLSI designs. [Citation Graph (0, 0)][DBLP]
    ISCAS (2), 2004, pp:401-404 [Conf]
  10. Ching-Wei Yeh
    On the acceleration of flow-oriented circuit clustering. [Citation Graph (0, 0)][DBLP]
    IEEE Trans. on CAD of Integrated Circuits and Systems, 1995, v:14, n:10, pp:1305-1308 [Journal]
  11. Ching-Wei Yeh, Chung-Kuan Cheng, Ting-Ting Y. Lin
    A general purpose, multiple-way partitioning algorithm. [Citation Graph (0, 0)][DBLP]
    IEEE Trans. on CAD of Integrated Circuits and Systems, 1994, v:13, n:12, pp:1480-1488 [Journal]
  12. Ching-Wei Yeh, Chung-Kuan Cheng, Ting-Ting Y. Lin
    Optimization by iterative improvement: an experimental evaluation on two-way partitioning. [Citation Graph (0, 0)][DBLP]
    IEEE Trans. on CAD of Integrated Circuits and Systems, 1995, v:14, n:2, pp:145-153 [Journal]
  13. Ching-Wei Yeh, Chung-Kuan Cheng, Ting-Ting Y. Lin
    Circuit clustering using a stochastic flow injection method. [Citation Graph (0, 0)][DBLP]
    IEEE Trans. on CAD of Integrated Circuits and Systems, 1995, v:14, n:2, pp:154-162 [Journal]
  14. Kuan-Hung Chen, Jiun-In Guo, Jinn-Shyan Wang, Ching-Wei Yeh, Jia-Wei Chen
    An Energy-Aware IP Core Design for the Variable-Length DCT/IDCT Targeting at MPEG4 Shape-Adaptive Transforms. [Citation Graph (0, 0)][DBLP]
    IEEE Trans. Circuits Syst. Video Techn., 2005, v:15, n:5, pp:704-715 [Journal]

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