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Alejandro F. González:
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- Alejandro F. González, Pinaki Mazumder
Compact Signed-Digit Adder Using Multiple-Valued Logic. [Citation Graph (0, 0)][DBLP] ARVLSI, 1997, pp:96-113 [Conf]
- Gilberto A. Gutiérrez, Gonzalo Navarro, Andrea Rodríguez, Alejandro F. González, José Orellana
A spatio-temporal access method based on snapshots and events. [Citation Graph (0, 0)][DBLP] GIS, 2005, pp:115-124 [Conf]
- Alejandro F. González, Mayukh Bhattacharya, Shriram Kulkarni, Pinaki Mazumder
Standard CMOS Implementation of a Multiple-Valued Logic Signed-Digit Adder Based on Negative Differential-Resistance Devices. [Citation Graph (0, 0)][DBLP] ISMVL, 2000, pp:323-0 [Conf]
- Alejandro F. González, Pinaki Mazumder
Comparison of Bistable Circuits Based on Resonant-Tunneling Diodes. [Citation Graph (0, 0)][DBLP] VLSI Design, 2003, pp:493-492 [Conf]
- Pinaki Mazumder, Shriram Kulkarni, Mayukh Bhattacharya, Alejandro F. González
Circuit Design using Resonant Tunneling Diodes. [Citation Graph (0, 0)][DBLP] VLSI Design, 1998, pp:501-506 [Conf]
- Alejandro F. González, Pinaki Mazumder
Redundant arithmetic, algorithms and implementations. [Citation Graph (0, 0)][DBLP] Integration, 2000, v:30, n:1, pp:13-53 [Journal]
- Alejandro F. González, Pinaki Mazumder
Multiple-Valued Signed-Digit Adder Using Negative Differential-Resistance Devices. [Citation Graph (0, 0)][DBLP] IEEE Trans. Computers, 1998, v:47, n:9, pp:947-959 [Journal]
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