Search the dblp DataBase
Hans M. Jacobson :
[Publications ]
[Author Rank by year ]
[Co-authors ]
[Prefers ]
[Cites ]
[Cited by ]
Publications of Author
Hans M. Jacobson , Ganesh Gopalakrishnan Asynchronous Microengines for Efficient High-level Control. [Citation Graph (0, 0)][DBLP ] ARVLSI, 1997, pp:201-218 [Conf ] Hans M. Jacobson , Erik Brunvand , Ganesh Gopalakrishnan , Prabhakar Kudva High-Level Asynchronous System Design Using the ACK Framework. [Citation Graph (0, 0)][DBLP ] ASYNC, 2000, pp:93-103 [Conf ] Hans M. Jacobson , Prabhakar Kudva , Pradip Bose , Peter W. Cook , Stanley Schuster Synchronous Interlocked Pipelines. [Citation Graph (0, 0)][DBLP ] ASYNC, 2002, pp:3-12 [Conf ] Chris J. Myers , Hans M. Jacobson Efficient Exact Two-Level Hazard-Free Logic Minimization. [Citation Graph (0, 0)][DBLP ] ASYNC, 2001, pp:64-73 [Conf ] Prabhakar Kudva , Ganesh Gopalakrishnan , Hans M. Jacobson A Technique for Synthesizing Distributed Burst-mode Circuits. [Citation Graph (0, 0)][DBLP ] DAC, 1996, pp:67-70 [Conf ] Prabhakar Kudva , Ganesh Gopalakrishnan , Hans M. Jacobson , Steven M. Nowick Synthesis for Hazard-free Customized CMOS Complex-Gate Networks Under Multiple-Input Changes. [Citation Graph (0, 0)][DBLP ] DAC, 1996, pp:77-82 [Conf ] Hans M. Jacobson , Pradip Bose , Zhigang Hu , Alper Buyuktosunoglu , Victor V. Zyuban , Rick Eickemeyer , Lee Eisen , John Griswell , Doug Logan , Balaram Sinharoy , Joel M. Tendler Stretching the Limits of Clock-Gating Efficiency in Server-Class Processors. [Citation Graph (0, 0)][DBLP ] HPCA, 2005, pp:238-242 [Conf ] Hans M. Jacobson , Chris J. Myers , Ganesh Gopalakrishnan Achieving Fast and Exact Hazard-Free Logic Minimization of Extended Burst-Mode gC Finite State Machines. [Citation Graph (0, 0)][DBLP ] ICCAD, 2000, pp:303-310 [Conf ] Zhigang Hu , Alper Buyuktosunoglu , Viji Srinivasan , Victor V. Zyuban , Hans M. Jacobson , Pradip Bose Microarchitectural techniques for power gating of execution units. [Citation Graph (0, 0)][DBLP ] ISLPED, 2004, pp:32-37 [Conf ] Hans M. Jacobson Improved clock-gating through transparent pipelining. [Citation Graph (0, 0)][DBLP ] ISLPED, 2004, pp:26-31 [Conf ] Pradip Bose , David Brooks , Alper Buyuktosunoglu , Peter W. Cook , K. Das , Philip G. Emma , Michael Gschwind , Hans M. Jacobson , Tejas Karkhanis , Prabhakar Kudva , Stanley Schuster , James E. Smith , Viji Srinivasan , Victor V. Zyuban , David H. Albonesi , Sandhya Dwarkadas Early-Stage Definition of LPX: A Low Power Issue-Execute Processor. [Citation Graph (0, 0)][DBLP ] PACS, 2002, pp:1-17 [Conf ] David Brooks , Pradip Bose , Stanley Schuster , Hans M. Jacobson , Prabhakar Kudva , Alper Buyuktosunoglu , John-David Wellman , Victor V. Zyuban , Manish Gupta , Peter W. Cook Power-Aware Microarchitecture: Design and Modeling Challenges for Next-Generation Microprocessors. [Citation Graph (0, 0)][DBLP ] IEEE Micro, 2000, v:20, n:6, pp:26-44 [Journal ] Hans M. Jacobson , Chris J. Myers Efficient algorithms for exact two-level hazard-free logic minimization. [Citation Graph (0, 0)][DBLP ] IEEE Trans. on CAD of Integrated Circuits and Systems, 2002, v:21, n:11, pp:1269-1283 [Journal ] Power-efficient, reliable microprocessor architectures: modeling and design methods. [Citation Graph (, )][DBLP ] Search in 0.002secs, Finished in 0.002secs