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Eric Mercer: [Publications] [Author Rank by year] [Co-authors] [Prefers] [Cites] [Cited by]

Publications of Author

  1. Kip C. Killpack, Eric Mercer, Chris J. Myers
    A Standard-Cell Self-Timed Multiplier for Energy and Area Critical Synchronous Systems. [Citation Graph (0, 0)][DBLP]
    ARVLSI, 2001, pp:188-201 [Conf]
  2. Hao Zheng, Eric Mercer, Chris J. Myers
    Automatic Abstraction for Verification of Timed Circuits and Systems. [Citation Graph (0, 0)][DBLP]
    CAV, 2001, pp:182-193 [Conf]
  3. Tomoya Kitai, Yusuke Oguro, Tomohiro Yoneda, Eric Mercer, Chris J. Myers
    Level Oriented Formal Model for Asynchronous Circuit Verification and its Efficient Analysis Method. [Citation Graph (0, 0)][DBLP]
    PRDC, 2002, pp:210-220 [Conf]
  4. Michael Jones, Eric Mercer
    Explicit State Model Checking with Hopper. [Citation Graph (0, 0)][DBLP]
    SPIN, 2004, pp:146-150 [Conf]
  5. Eric Mercer, Michael Jones
    Model Checking Machine Code with the GNU Debugger. [Citation Graph (0, 0)][DBLP]
    SPIN, 2005, pp:251-265 [Conf]
  6. Michael Jones, Eric Mercer, Tonglaga Bao, Rahul Kumar, Peter Lamborn
    Benchmarking Explicit State Parallel Model Checkers. [Citation Graph (0, 0)][DBLP]
    Electr. Notes Theor. Comput. Sci., 2003, v:89, n:1, pp:- [Journal]
  7. Eric Mercer, Chris J. Myers, Tomohiro Yoneda
    Modular Synthesis of Timed Circuits using Partial Order Reduction. [Citation Graph (0, 0)][DBLP]
    Electr. Notes Theor. Comput. Sci., 2002, v:65, n:6, pp:- [Journal]
  8. Hao Zheng, Eric Mercer, Chris J. Myers
    Modular verification of timed circuits using automatic abstraction. [Citation Graph (0, 0)][DBLP]
    IEEE Trans. on CAD of Integrated Circuits and Systems, 2003, v:22, n:9, pp:1138-1153 [Journal]

  9. MCC: A runtime verification tool for MCAPI user applications. [Citation Graph (, )][DBLP]


  10. Slicing and dicing bugs in concurrent programs. [Citation Graph (, )][DBLP]


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