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Conrad H. Ziesler: [Publications] [Author Rank by year] [Co-authors] [Prefers] [Cites] [Cited by]

Publications of Author

  1. Suhwan Kim, Conrad H. Ziesler, Marios C. Papaefthymiou
    Design, Verification, and Test of a True Single-Phase 8-bit Adiabatic Multiplier. [Citation Graph (0, 0)][DBLP]
    ARVLSI, 2001, pp:42-58 [Conf]
  2. Visvesh S. Sathe, Juang-Ying Chueh, Joohee Kim, Conrad H. Ziesler, Suhwan Kim, Marios C. Papaefthymiou
    Fast, efficient, recovering, and irreversible. [Citation Graph (0, 0)][DBLP]
    Conf. Computing Frontiers, 2005, pp:407-413 [Conf]
  3. Suhwan Kim, Conrad H. Ziesler, Marios C. Papaefthymiou
    A True Single-Phase 8-bit Adiabatic Multiplier. [Citation Graph (0, 0)][DBLP]
    DAC, 2001, pp:758-763 [Conf]
  4. Juang-Ying Chueh, Conrad H. Ziesler, Marios C. Papaefthymiou
    Empirical evaluation of timing and power in resonant clock distribution. [Citation Graph (0, 0)][DBLP]
    ISCAS (2), 2004, pp:249-252 [Conf]
  5. Joohee Kim, Conrad H. Ziesler, Marios C. Papaefthymiou
    Energy recovering static memory. [Citation Graph (0, 0)][DBLP]
    ISLPED, 2002, pp:92-97 [Conf]
  6. Visvesh S. Sathe, Marios C. Papaefthymiou, Conrad H. Ziesler
    A GHz-class charge recovery logic. [Citation Graph (0, 0)][DBLP]
    ISLPED, 2005, pp:91-94 [Conf]
  7. Conrad H. Ziesler, Suhwan Kim, Marios C. Papaefthymiou
    A resonant clock generator for single-phase adiabatic systems. [Citation Graph (0, 0)][DBLP]
    ISLPED, 2001, pp:159-164 [Conf]
  8. Conrad H. Ziesler, Joohee Kim, Visvesh S. Sathe, Marios C. Papaefthymiou
    A 225 MHz resonant clocked ASIC chip. [Citation Graph (0, 0)][DBLP]
    ISLPED, 2003, pp:48-53 [Conf]
  9. Joohee Kim, Conrad H. Ziesler
    Fixed-Load Energy Recovery Memory for Low Power. [Citation Graph (0, 0)][DBLP]
    ISVLSI, 2004, pp:145-150 [Conf]
  10. Juang-Ying Chueh, Marios C. Papaefthymiou, Conrad H. Ziesler
    Two-Phase Resonant Clock Distribution. [Citation Graph (0, 0)][DBLP]
    ISVLSI, 2005, pp:65-70 [Conf]
  11. Juang-Ying Chueh, Conrad H. Ziesler, Marios C. Papaefthymiou
    Experimental Evaluation of Resonant Clock Distribution. [Citation Graph (0, 0)][DBLP]
    ISVLSI, 2004, pp:135-140 [Conf]
  12. Visvesh S. Sathe, Marios C. Papaefthymiou, Conrad H. Ziesler
    Boost Logic: A High Speed Energy Recovery Circuit Family. [Citation Graph (0, 0)][DBLP]
    ISVLSI, 2005, pp:22-27 [Conf]
  13. Conrad H. Ziesler, Joohee Kim, Marios C. Papaefthymiou
    Energy Recovering ASIC Design. [Citation Graph (0, 0)][DBLP]
    ISVLSI, 2003, pp:133-138 [Conf]
  14. Dan Ernst, Nam Sung Kim, Shidhartha Das, Sanjay Pant, Rajeev R. Rao, Toan Pham, Conrad H. Ziesler, David Blaauw, Todd M. Austin, Krisztián Flautner, Trevor N. Mudge
    Razor: A Low-Power Pipeline Based on Circuit-Level Timing Speculation. [Citation Graph (0, 0)][DBLP]
    MICRO, 2003, pp:7-18 [Conf]
  15. Suhwan Kim, Conrad H. Ziesler
    A clockless future for systems on chip. [Citation Graph (0, 0)][DBLP]
    IEEE Design & Test of Computers, 2003, v:20, n:6, pp:120-0 [Journal]
  16. Suhwan Kim, Conrad H. Ziesler, Marios C. Papaefthymiou
    Fine-grain real-time reconfigurable pipelining. [Citation Graph (0, 0)][DBLP]
    IBM Journal of Research and Development, 2003, v:47, n:5-6, pp:599-610 [Journal]
  17. Suhwan Kim, Conrad H. Ziesler, Marios C. Papaefthymiou
    Charge-Recovery Computing on Silicon. [Citation Graph (0, 0)][DBLP]
    IEEE Trans. Computers, 2005, v:54, n:6, pp:651-659 [Journal]
  18. Suhwan Kim, Conrad H. Ziesler, Marios C. Papaefthymiou
    A true single-phase energy-recovery multiplier. [Citation Graph (0, 0)][DBLP]
    IEEE Trans. VLSI Syst., 2003, v:11, n:2, pp:194-207 [Journal]

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