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Jeffrey M. Arnold: [Publications] [Author Rank by year] [Co-authors] [Prefers] [Cites] [Cited by]

Publications of Author

  1. Jeffrey M. Arnold
    Software Configurable Processors. [Citation Graph (0, 0)][DBLP]
    ASAP, 2006, pp:45-49 [Conf]
  2. Jeffrey M. Arnold
    Mapping the MD5 Hash Algorithm onto the NAPA Architecture. [Citation Graph (0, 0)][DBLP]
    FCCM, 1998, pp:267-268 [Conf]
  3. Jeffrey M. Arnold
    An Architecture Simulator for National Semiconductor's Adaptive Processing Architecture (NAPA). [Citation Graph (0, 0)][DBLP]
    FCCM, 1998, pp:271-272 [Conf]
  4. Maya Gokhale, Janice M. Stone, Jeffrey M. Arnold, Mirek Kalinowski
    Stream-Oriented FPGA Computing in the Streams-C High Level Language. [Citation Graph (0, 0)][DBLP]
    FCCM, 2000, pp:49-58 [Conf]
  5. Charlé R. Rupp, Mark Landguth, Tim Garverick, Edson Gomersall, Harry Holt, Jeffrey M. Arnold, Maya Gokhale
    The NAPA Adaptive Processing Architecture. [Citation Graph (0, 0)][DBLP]
    FCCM, 1998, pp:28-0 [Conf]
  6. Jeffrey M. Arnold
    S5: The Architecture and Development Flow of a Software Configurable Processor. [Citation Graph (0, 0)][DBLP]
    FPT, 2005, pp:121-128 [Conf]
  7. Jeffrey M. Arnold, Duncan A. Buell, Dzung T. Hoang, Daniel V. Pryor, Nabeel Shirazi, Mark R. Thistle
    The Splash 2 Processor and Applications. [Citation Graph (0, 0)][DBLP]
    ICCD, 1993, pp:482-485 [Conf]
  8. Jeffrey M. Arnold, Duncan A. Buell, Elaine G. Davis
    Splash 2. [Citation Graph (0, 0)][DBLP]
    SPAA, 1992, pp:316-322 [Conf]
  9. Thomas L. Sterling, Jeffrey M. Arnold
    Fine Grain Dataflow Computation without Tokens for Balanced Execution. [Citation Graph (0, 0)][DBLP]
    J. Parallel Distrib. Comput., 1993, v:18, n:3, pp:327-339 [Journal]
  10. Jeffrey M. Arnold
    The Architecture and Development Flow of the S5 Software Configurable Processor. [Citation Graph (0, 0)][DBLP]
    VLSI Signal Processing, 2007, v:47, n:1, pp:3-14 [Journal]

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