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Massimo Maresca: [Publications] [Author Rank by year] [Co-authors] [Prefers] [Cites] [Cited by]

Publications of Author

  1. Pierpaolo Baglietto, Massimo Maresca, A. Migliaro, Mauro Migliardi
    Parallel Implementation of the Full Search Block Matching Algorithm for Motion Estimation. [Citation Graph (0, 0)][DBLP]
    ASAP, 1995, pp:182-192 [Conf]
  2. Nicola Zingirian, Massimo Maresca
    Loop Regularization for Image and Video Processing on Instruction Level Parallel Architectures. [Citation Graph (0, 0)][DBLP]
    CAMP, 2000, pp:261-269 [Conf]
  3. Pierpaolo Baglietto, Francesco Moggia, Nicola Zingirian, Massimo Maresca
    Application Level Smart Card Support through Networked Mobile Devices. [Citation Graph (0, 0)][DBLP]
    Communications and Multimedia Security, 2003, pp:172-180 [Conf]
  4. Pierpaolo Baglietto, Massimo Maresca, Andrea Parodi, Nicola Zingirian
    Deployment of Service Oriented Architecture for a Business Community. [Citation Graph (0, 0)][DBLP]
    EDOC, 2002, pp:293-304 [Conf]
  5. Pierpaolo Baglietto, Massimo Maresca, Mauro Migliardi
    Introducing Execution Autonomy in the SIMD Computing Paradigm. [Citation Graph (0, 0)][DBLP]
    EUROSIM, 1994, pp:295-303 [Conf]
  6. Mauro Migliardi, Pierpaolo Baglietto, Massimo Maresca
    Virtual Parallelism allows Relaxing the Synchronization Constraints of SIMD Computing Paradigm. [Citation Graph (0, 0)][DBLP]
    HPCN Europe, 1998, pp:784-793 [Conf]
  7. Mauro Migliardi, Massimo Maresca
    Modeling Instruction Level Parallel Architectures Efficiency in Image Processing Applications. [Citation Graph (0, 0)][DBLP]
    HPCN Europe, 1997, pp:738-751 [Conf]
  8. Nicola Zingirian, Massimo Maresca
    Run-Time Support to Register Allocation for Loop Parallelization of Image Processing Programs. [Citation Graph (0, 0)][DBLP]
    HPCN Europe, 2000, pp:343-352 [Conf]
  9. Nicola Zingirian, Massimo Maresca
    Selective Register Renaming: A Compiler-Driven Approach to Dynamic Register Renaming. [Citation Graph (0, 0)][DBLP]
    HPCN Europe, 2001, pp:344-352 [Conf]
  10. Nicola Zingirian, Massimo Maresca
    Scheduling Image Processing Program Activities on Instruction Level Parallel RISC Through Program Transformations. [Citation Graph (0, 0)][DBLP]
    HPCN Europe, 1997, pp:674-687 [Conf]
  11. Nicola Zingirian, Massimo Maresca
    Finding the Optimal Unroll-and-Jam. [Citation Graph (0, 0)][DBLP]
    HPCN Europe, 1999, pp:633-642 [Conf]
  12. Nicola Zingirian, Massimo Maresca, S. Nalin
    Efficiency of Standard Software Architectures for JAVA-Based Access to Remote Databases. [Citation Graph (0, 0)][DBLP]
    HPCN Europe, 1998, pp:479-488 [Conf]
  13. Massimo Maresca, Pierpaolo Baglietto
    Transitive Closure and Graph Component Labeling on Realistic Processor Arrays Based on Reconfigurable Mesh Network. [Citation Graph (0, 0)][DBLP]
    ICCD, 1991, pp:229-232 [Conf]
  14. Pierpaolo Baglietto, Massimo Maresca, A. Migliaro, Mauro Migliardi
    A VLSI Scalable Processor Array for Motion Estimation. [Citation Graph (0, 0)][DBLP]
    ICIAP, 1995, pp:127-132 [Conf]
  15. Nicola Zingirian, Pierpaolo Baglietto, Massimo Maresca, Mauro Migliardi
    Customizing MPEG Video Compression Algorithms to Specific Application Domains: The Case of Highway Monitoring. [Citation Graph (0, 0)][DBLP]
    ICIAP (2), 1997, pp:46-53 [Conf]
  16. Hungwen Li, Massimo Maresca
    Polymorphic-Torus Network. [Citation Graph (0, 0)][DBLP]
    ICPP, 1987, pp:411-414 [Conf]
  17. Massimo Maresca, Hungwen Li, Pierpaolo Baglietto
    Hardware Suport for Fast Reconfigurability in Processor Arrays. [Citation Graph (0, 0)][DBLP]
    ICPP, 1993, pp:282-289 [Conf]
  18. Pierpaolo Baglietto, Massimo Maresca, Mauro Migliardi
    A Parallel Algorithm for Minimum Cost Path Computation on Polymorphic Processor Array. [Citation Graph (0, 0)][DBLP]
    IPPS/SPDP Workshops, 1998, pp:13-18 [Conf]
  19. Mauro Migliardi, Stefano Zappaterra, Massimo Maresca, Chiara Bisso
    HARNESSing Intranet Computational Power for Legacy Applications: The Case of Ship Vulnerability Evaluation. [Citation Graph (0, 0)][DBLP]
    IPDPS, 2003, pp:103- [Conf]
  20. Riccardo Gusella, Massimo Maresca
    Design Considerations for a Multimedia Network Distribution Center. [Citation Graph (0, 0)][DBLP]
    NOSSDAV, 1991, pp:185-196 [Conf]
  21. Massimo Maresca, Pierpaolo Baglietto, A. Giordano
    An Analysis of the Propagation Delay in Reconfigurable Processor Arrays. [Citation Graph (0, 0)][DBLP]
    PARCO, 1993, pp:379-386 [Conf]
  22. Pierpaolo Baglietto, Massimo Maresca, Andrea Parodi, Nicola Zingirian
    Stepwise deployment methodology of a service oriented architecture for business communities. [Citation Graph (0, 0)][DBLP]
    Information & Software Technology, 2005, v:47, n:6, pp:427-436 [Journal]
  23. Massimo Maresca, Hungwen Li
    Virtual Parallelism Support in Reconfigurable Processor Arrays. [Citation Graph (0, 0)][DBLP]
    J. Inf. Sci. Eng., 1993, v:9, n:1, pp:45-60 [Journal]
  24. Massimo Maresca, Hungwen Li
    Connection Autonomy in SIMD Computers: A VLSI Implementation. [Citation Graph (0, 0)][DBLP]
    J. Parallel Distrib. Comput., 1989, v:7, n:2, pp:302-320 [Journal]
  25. Hungwen Li, Massimo Maresca
    Polymorphic-Torus Architecture for Computer Vision. [Citation Graph (0, 0)][DBLP]
    IEEE Trans. Pattern Anal. Mach. Intell., 1989, v:11, n:3, pp:233-243 [Journal]
  26. Hungwen Li, Massimo Maresca
    Polymorphic-Torus Network. [Citation Graph (0, 0)][DBLP]
    IEEE Trans. Computers, 1989, v:38, n:9, pp:1345-1351 [Journal]
  27. Massimo Maresca
    Polymorphic Processor Arrays. [Citation Graph (0, 0)][DBLP]
    IEEE Trans. Parallel Distrib. Syst., 1993, v:4, n:5, pp:490-506 [Journal]
  28. M. Fornasa, Massimo Maresca, Nicola Zingirian, L. Ballardin, S. Bedin
    Development of a service-oriented architecture for the dynamic integration of mobile remote software components. [Citation Graph (0, 0)][DBLP]
    ETFA, 2005, pp:- [Conf]
  29. Nicola Zingirian, Massimo Maresca, S. Nalin
    Efficiency of standard software architectures for Java-based access to remote databases. [Citation Graph (0, 0)][DBLP]
    Future Generation Comp. Syst., 1999, v:15, n:3, pp:417-424 [Journal]

  30. Mashup Patterns from Service Component Taxonomy. [Citation Graph (, )][DBLP]


  31. An execution platform for event driven mashups. [Citation Graph (, )][DBLP]


  32. Experiments and performance evaluation of Event Driven Mashups. [Citation Graph (, )][DBLP]


  33. Restructuring the Flow of Image and Video Processing Programs to Increase Instruction Level Parallelism. [Citation Graph (, )][DBLP]


  34. Extensive GPRS Latency Characterization in Uplink Packet Transmission from Moving Vehicles. [Citation Graph (, )][DBLP]


  35. An Approach to Event Driven Services and Composite Services. [Citation Graph (, )][DBLP]


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