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Florin Balasa: [Publications] [Author Rank by year] [Co-authors] [Prefers] [Cites] [Cited by]

Publications of Author

  1. Florin Balasa, Per Gunnar Kjeldsberg, Martin Palkovic, Arnout Vandecappelle, Francky Catthoor
    Loop Transformation Methodologies for Array-Oriented Memory Management. [Citation Graph (0, 0)][DBLP]
    ASAP, 2006, pp:205-212 [Conf]
  2. Florin Balasa
    Device-level placement for analog layout: an opportunity for non-slicing topological representations. [Citation Graph (0, 0)][DBLP]
    ASP-DAC, 2001, pp:281-286 [Conf]
  3. Hongwei Zhu, Ilie I. Luican, Florin Balasa
    Memory size computation for multimedia processing applications. [Citation Graph (0, 0)][DBLP]
    ASP-DAC, 2006, pp:802-807 [Conf]
  4. Peter Grun, Florin Balasa, Nikil D. Dutt
    Memory size estimation for multimedia applications. [Citation Graph (0, 0)][DBLP]
    CODES, 1998, pp:145-149 [Conf]
  5. Florin Balasa, Koen Lampaert
    Module Placement for Analog Layout Using the Sequence-Pair Representation. [Citation Graph (0, 0)][DBLP]
    DAC, 1999, pp:274-279 [Conf]
  6. Yingxin Pang, Florin Balasa, Koen Lampaert, Chung-Kuan Cheng
    Block placement with symmetry constraints based on the O-tree non-slicing representation. [Citation Graph (0, 0)][DBLP]
    DAC, 2000, pp:464-467 [Conf]
  7. Hongwei Zhu, Karthik Cbandramouli, Yan Yue, Florin Balasa
    Algebraic techniques in the memory size computation of multimedia processing applications. [Citation Graph (0, 0)][DBLP]
    ESTImedia, 2004, pp:67-72 [Conf]
  8. Florin Balasa, Werner Geurts, Francky Catthoor, Hugo De Man
    Solving large scale assignment problems in high-level synthesis by approximative quadratic programming. [Citation Graph (0, 0)][DBLP]
    ACM Great Lakes Symposium on VLSI, 2001, pp:19-24 [Conf]
  9. Florin Balasa
    Modeling Non-Slicing Floorplans with Binary Trees. [Citation Graph (0, 0)][DBLP]
    ICCAD, 2000, pp:13-16 [Conf]
  10. Florin Balasa, Francky Catthoor, Hugo De Man
    Exact evaluation of memory size for multi-dimensional signal processing systems. [Citation Graph (0, 0)][DBLP]
    ICCAD, 1993, pp:669-672 [Conf]
  11. Florin Balasa, Francky Catthoor, Hugo De Man
    Dataflow-driven memory allocation for multi-dimensional signal processing systems. [Citation Graph (0, 0)][DBLP]
    ICCAD, 1994, pp:31-34 [Conf]
  12. Florin Balasa, Sarat C. Maruvada, Karthik Krishnamoorthy
    Efficient solution space exploration based on segment trees in analog placement with symmetry constraints. [Citation Graph (0, 0)][DBLP]
    ICCAD, 2002, pp:497-502 [Conf]
  13. Ilie I. Luican, Hongwei Zhu, Florin Balasa
    Formal model of data reuse analysis for hierarchical memory organizations. [Citation Graph (0, 0)][DBLP]
    ICCAD, 2006, pp:595-600 [Conf]
  14. Sarat C. Maruvada, Karthik Krishnamoorthy, Subodh Annojvala, Florin Balasa
    Placement with symmetry constraints for analog layout using red-black trees. [Citation Graph (0, 0)][DBLP]
    ISCAS (5), 2003, pp:489-492 [Conf]
  15. Florin Balasa, Frank H. M. Franssen, Francky Catthoor, Hugo De Man
    Transformation of Nested Loops with Modulo Indexing to Affine Recurrences. [Citation Graph (0, 0)][DBLP]
    Parallel Processing Letters, 1994, v:4, n:, pp:271-280 [Journal]
  16. Florin Balasa, Francky Catthoor, Hugo De Man
    Practical solutions for counting scalars and dependences in ATOMIUM-a memory management system for multidimensional signal processing. [Citation Graph (0, 0)][DBLP]
    IEEE Trans. on CAD of Integrated Circuits and Systems, 1997, v:16, n:2, pp:133-145 [Journal]
  17. Florin Balasa, Koen Lampaert
    Symmetry within the sequence-pair representation in the context ofplacement for analog design. [Citation Graph (0, 0)][DBLP]
    IEEE Trans. on CAD of Integrated Circuits and Systems, 2000, v:19, n:7, pp:721-731 [Journal]
  18. Florin Balasa, Sarat C. Maruvada, Karthik Krishnamoorthy
    On the exploration of the solution space in analog placement with symmetry constraints. [Citation Graph (0, 0)][DBLP]
    IEEE Trans. on CAD of Integrated Circuits and Systems, 2004, v:23, n:2, pp:177-191 [Journal]
  19. Hongwei Zhu, Ilie I. Luican, Florin Balasa
    Mapping multi-dimensional signals into hierarchical memory organizations. [Citation Graph (0, 0)][DBLP]
    DATE, 2007, pp:385-390 [Conf]
  20. Karthik Krishnamoorthy, Sarat C. Maruvada, Florin Balasa
    Topological Placement with Multiple Symmetry Groups of Devices for Analog Layout Design. [Citation Graph (0, 0)][DBLP]
    ISCAS, 2007, pp:2032-2035 [Conf]
  21. Florin Balasa, Hongwei Zhu, Ilie I. Luican
    Computation of Storage Requirements for Multi-Dimensional Signal Processing Applications. [Citation Graph (0, 0)][DBLP]
    IEEE Trans. VLSI Syst., 2007, v:15, n:4, pp:447-460 [Journal]
  22. Frank H. M. Franssen, Florin Balasa, M. F. X. B. van Swaaij, Francky Catthoor, Hugo De Man
    Modeling multidimensional data and control flow. [Citation Graph (0, 0)][DBLP]
    IEEE Trans. VLSI Syst., 1993, v:1, n:3, pp:319-327 [Journal]
  23. Florin Balasa, Francky Catthoor, Hugo De Man
    Background memory area estimation for multidimensional signal processing systems. [Citation Graph (0, 0)][DBLP]
    IEEE Trans. VLSI Syst., 1995, v:3, n:2, pp:157-172 [Journal]

  24. System-level exploration tool for energy-aware memory management in the design of multidimensional signal processing systems. [Citation Graph (, )][DBLP]


  25. Signal-to-Memory Mapping Analysis for Multimedia Signal Processing. [Citation Graph (, )][DBLP]


  26. Analog layout synthesis - Recent advances in topological approaches. [Citation Graph (, )][DBLP]


  27. Mapping model with inter-array memory sharing for multidimensional signal processing. [Citation Graph (, )][DBLP]


  28. Efficient assignment algorithm for mapping multidimensional signals into the physical memory. [Citation Graph (, )][DBLP]


  29. Automatic generation of maps of memory accesses for energy-aware memory management. [Citation Graph (, )][DBLP]


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