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Edwin Rijpkema: [Publications] [Author Rank by year] [Co-authors] [Prefers] [Cites] [Cited by]

Publications of Author

  1. Ed F. Deprettere, Edwin Rijpkema, Paul Lieverse, Bart Kienhuis
    High Level Modeling for Parallel Executions of Nested Loop Algorithms. [Citation Graph (0, 0)][DBLP]
    ASAP, 2000, pp:79-91 [Conf]
  2. Edwin Rijpkema, Gerben J. Hekstra, Ed F. Deprettere, Jun Ma
    A strategy for determining a Jacobi specific dataflow processor. [Citation Graph (0, 0)][DBLP]
    ASAP, 1997, pp:53-0 [Conf]
  3. Biniam Gebremichael, Frits W. Vaandrager, Miaomiao Zhang, Kees Goossens, Edwin Rijpkema, Andrei Radulescu
    Deadlock Prevention in the Æthereal Protocol. [Citation Graph (0, 0)][DBLP]
    CHARME, 2005, pp:345-348 [Conf]
  4. Bart Kienhuis, Edwin Rijpkema, Ed F. Deprettere
    Compaan: deriving process networks from Matlab for embedded signal processing architectures. [Citation Graph (0, 0)][DBLP]
    CODES, 2000, pp:13-17 [Conf]
  5. Kees Goossens, John Dielissen, Om Prakash Gangwal, Santiago González Pestana, Andrei Radulescu, Edwin Rijpkema
    A Design Flow for Application-Specific Networks on Chip with Guaranteed Performance to Accelerate SOC Design and Verification. [Citation Graph (0, 0)][DBLP]
    DATE, 2005, pp:1182-1187 [Conf]
  6. Santiago González Pestana, Edwin Rijpkema, Andrei Radulescu, Kees G. W. Goossens, Om Prakash Gangwal
    Cost-Performance Trade-Offs in Networks on Chip: A Simulation-Based Approach. [Citation Graph (0, 0)][DBLP]
    DATE, 2004, pp:764-769 [Conf]
  7. Andrei Radulescu, John Dielissen, Kees G. W. Goossens, Edwin Rijpkema, Paul Wielage
    An Efficient On-Chip Network Interface Offering Guaranteed Services, Shared-Memory Abstraction, and Flexible Network Configuration. [Citation Graph (0, 0)][DBLP]
    DATE, 2004, pp:878-883 [Conf]
  8. Edwin Rijpkema, Kees G. W. Goossens, Andrei Radulescu, John Dielissen, Jef L. van Meerbergen, Paul Wielage, E. Waterlander
    Trade Offs in the Design of a Router with Both Guaranteed and Best-Effort Services for Networks on Chip. [Citation Graph (0, 0)][DBLP]
    DATE, 2003, pp:10350-10355 [Conf]
  9. Ed F. Deprettere, Edwin Rijpkema, Bart Kienhuis
    Translating Imperative Affine Nested Loop Programs into Process Networks. [Citation Graph (0, 0)][DBLP]
    Embedded Processor Design Challenges, 2002, pp:89-111 [Conf]
  10. Edwin Rijpkema, Ed F. Deprettere, Bart Kienhuis
    Deriving Process Networks from Nested Loop Algorithms. [Citation Graph (0, 0)][DBLP]
    Parallel Processing Letters, 2000, v:10, n:2/3, pp:165-176 [Journal]
  11. Andrei Radulescu, John Dielissen, Santiago González Pestana, Om Prakash Gangwal, Edwin Rijpkema, Paul Wielage, Kees G. W. Goossens
    An efficient on-chip NI offering guaranteed services, shared-memory abstraction, and flexible network configuration. [Citation Graph (0, 0)][DBLP]
    IEEE Trans. on CAD of Integrated Circuits and Systems, 2005, v:24, n:1, pp:4-17 [Journal]

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