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Lejla Batina: [Publications] [Author Rank by year] [Co-authors] [Prefers] [Cites] [Cited by]

Publications of Author

  1. Lejla Batina, Nele Mentens, Bart Preneel, Ingrid Verbauwhede
    Side-channel aware design: Algorithms and Architectures for Elliptic Curve Cryptography over GF(2n). [Citation Graph (0, 0)][DBLP]
    ASAP, 2005, pp:350-355 [Conf]
  2. Siddika Berna Örs, Lejla Batina, Bart Preneel, Joos Vandewalle
    Hardware Implementation of an Elliptic Curve Processor over GF(p). [Citation Graph (0, 0)][DBLP]
    ASAP, 2003, pp:433-443 [Conf]
  3. Lejla Batina, David Hwang, Alireza Hodjat, Bart Preneel, Ingrid Verbauwhede
    Hardware/Software Co-design for Hyperelliptic Curve Cryptography (HECC) on the 8051µP. [Citation Graph (0, 0)][DBLP]
    CHES, 2005, pp:106-118 [Conf]
  4. Kazuo Sakiyama, Lejla Batina, Bart Preneel, Ingrid Verbauwhede
    Superscalar Coprocessor for High-Speed Curve-Based Cryptography. [Citation Graph (0, 0)][DBLP]
    CHES, 2006, pp:415-429 [Conf]
  5. Pim Tuyls, Lejla Batina
    RFID-Tags for Anti-counterfeiting. [Citation Graph (0, 0)][DBLP]
    CT-RSA, 2006, pp:115-131 [Conf]
  6. Lejla Batina, Geeke Bruin-Muurling, Siddika Berna Örs
    Flexible Hardware Design for RSA and Elliptic Curve Cryptosystems. [Citation Graph (0, 0)][DBLP]
    CT-RSA, 2004, pp:250-263 [Conf]
  7. Lejla Batina, Geeke Muurling
    Montgomery in Practice: How to Do It More Efficiently in Hardware. [Citation Graph (0, 0)][DBLP]
    CT-RSA, 2002, pp:40-52 [Conf]
  8. Nele Mentens, Lejla Batina, Bart Preneel, Ingrid Verbauwhede
    A Systematic Evaluation of Compact Hardware Implementations for the Rijndael S-Box. [Citation Graph (0, 0)][DBLP]
    CT-RSA, 2005, pp:323-333 [Conf]
  9. Lejla Batina, Nele Mentens, Kazuo Sakiyama, Bart Preneel, Ingrid Verbauwhede
    Low-Cost Elliptic Curve Cryptography for Wireless Sensor Networks. [Citation Graph (0, 0)][DBLP]
    ESAS, 2006, pp:6-17 [Conf]
  10. Lejla Batina, Geeke Muurling
    Another Way of Doing RSA Cryptography in Hardware. [Citation Graph (0, 0)][DBLP]
    IMA Int. Conf., 2001, pp:364-373 [Conf]
  11. Lejla Batina, Nele Mentens, Ingrid Verbauwhede
    Side-Channel Issues for Designing Secure Hardware Implementations. [Citation Graph (0, 0)][DBLP]
    IOLTS, 2005, pp:118-121 [Conf]
  12. Siddika Berna Örs, Lejla Batina, Bart Preneel, Joos Vandewalle
    Hardware Implementation of a Montgomery Modular Multiplier in a Systolic Array. [Citation Graph (0, 0)][DBLP]
    IPDPS, 2003, pp:184- [Conf]
  13. Sheng-Bo Xu, Lejla Batina
    Efficient Implementation of Elliptic Curve Cryptosystems on an ARM7 with Hardware Accelerator. [Citation Graph (0, 0)][DBLP]
    ISC, 2001, pp:266-279 [Conf]
  14. Lejla Batina, Siddika Berna Örs, Bart Preneel, Joos Vandewalle
    Hardware architectures for public key cryptography. [Citation Graph (0, 0)][DBLP]
    Integration, 2003, v:34, n:1-2, pp:1-64 [Journal]
  15. Alireza Hodjat, Lejla Batina, David Hwang, Ingrid Verbauwhede
    HW/SW co-design of a hyperelliptic curve cryptosystem using a microcode instruction set coprocessor. [Citation Graph (0, 0)][DBLP]
    Integration, 2007, v:40, n:1, pp:45-51 [Journal]
  16. Nele Mentens, Kazuo Sakiyama, Lejla Batina, Ingrid Verbauwhede, Bart Preneel
    Fpga-Oriented Secure Data Path Design: Implementation of a Public Key Coprocessor. [Citation Graph (0, 0)][DBLP]
    FPL, 2006, pp:1-6 [Conf]
  17. Lejla Batina, Alireza Hodjat, David Hwang, Kazuo Sakiyama, Ingrid Verbauwhede
    Reconfigurable Architectures for Curve-Based Cryptography on Embedded Micro-Controllers. [Citation Graph (0, 0)][DBLP]
    FPL, 2006, pp:1-4 [Conf]
  18. Lejla Batina, Nele Mentens, Kazuo Sakiyama, Bart Preneel, Ingrid Verbauwhede
    Public-Key Cryptography on the Top of a Needle. [Citation Graph (0, 0)][DBLP]
    ISCAS, 2007, pp:1831-1834 [Conf]
  19. Lejla Batina, Nele Mentens, Bart Preneel, Ingrid Verbauwhede
    Flexible hardware architectures for curve-based cryptography. [Citation Graph (0, 0)][DBLP]
    ISCAS, 2006, pp:- [Conf]
  20. Nele Mentens, Kazuo Sakiyama, Lejla Batina, Bart Preneel, Ingrid Verbauwhede
    A Side-channel Attack Resistant Programmable PKC Coprocessor for Embedded Applications. [Citation Graph (0, 0)][DBLP]
    ICSAMOS, 2007, pp:194-200 [Conf]
  21. Kazuo Sakiyama, Nele Mentens, Lejla Batina, Bart Preneel, Ingrid Verbauwhede
    Reconfigurable Modular Arithmetic Logic Unit for High-Performance Public-Key Cryptosystems. [Citation Graph (0, 0)][DBLP]
    ARC, 2006, pp:347-357 [Conf]
  22. Nele Mentens, Lejla Batina, Bart Preneel, Ingrid Verbauwhede
    Time-Memory Trade-Off Attack on FPGA Platforms: UNIX Password Cracking. [Citation Graph (0, 0)][DBLP]
    ARC, 2006, pp:323-334 [Conf]
  23. Kazuo Sakiyama, Lejla Batina, Bart Preneel, Ingrid Verbauwhede
    Multicore Curve-Based Cryptoprocessor with Reconfigurable Modular Arithmetic Logic Units over GF(2n). [Citation Graph (0, 0)][DBLP]
    IEEE Trans. Computers, 2007, v:56, n:9, pp:1269-1282 [Journal]
  24. Kazuo Sakiyama, Lejla Batina, Bart Preneel, Ingrid Verbauwhede
    HW/SW co-design for public-key cryptosystems on the 8051 micro-controller. [Citation Graph (0, 0)][DBLP]
    Computers & Electrical Engineering, 2007, v:33, n:5-6, pp:324-332 [Journal]

  25. A Very Compact "Perfectly Masked" S-Box for AES. [Citation Graph (, )][DBLP]


  26. Low-cost implementations of NTRU for pervasive security. [Citation Graph (, )][DBLP]


  27. Developing Efficient Blinded Attribute Certificates on Smart Cards via Pairings. [Citation Graph (, )][DBLP]


  28. Mutual Information Analysis. [Citation Graph (, )][DBLP]


  29. Differential Cluster Analysis. [Citation Graph (, )][DBLP]


  30. Revisiting Higher-Order DPA Attacks: . [Citation Graph (, )][DBLP]


  31. FPGA Design for Algebraic Tori-Based Public-Key Cryptography. [Citation Graph (, )][DBLP]


  32. Power Variance Analysis breaks a masked ASIC implementation of AES. [Citation Graph (, )][DBLP]


  33. FPGA-based testing strategy for cryptographic chips: A case study on Elliptic Curve Processor for RFID tags. [Citation Graph (, )][DBLP]


  34. Comparative Evaluation of Rank Correlation Based DPA on an AES Prototype Chip. [Citation Graph (, )][DBLP]


  35. Public-Key Cryptography for RFID-Tags. [Citation Graph (, )][DBLP]


  36. HECC Goes Embedded: An Area-Efficient Implementation of HECC. [Citation Graph (, )][DBLP]


  37. Identification via location-profiling in GSM networks. [Citation Graph (, )][DBLP]


  38. Low-cost untraceable authentication protocols for RFID. [Citation Graph (, )][DBLP]


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