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Guido Bertoni: [Publications] [Author Rank by year] [Co-authors] [Prefers] [Cites] [Cited by]

Publications of Author

  1. Guido Bertoni, Luca Breveglieri, Israel Koren, Paolo Maistri, Vincenzo Piuri
    On the Propagation of Faults and Their Detection in a Hardware Implementation of the Advanced Encryption Standard. [Citation Graph (0, 0)][DBLP]
    ASAP, 2002, pp:303-0 [Conf]
  2. Guido Bertoni, Luca Breveglieri, Israel Koren, Paolo Maistri, Vincenzo Piuri
    Concurrent Fault Detection in a Hardware Implementation of the RC5 Encryption Algorithm. [Citation Graph (0, 0)][DBLP]
    ASAP, 2003, pp:423-432 [Conf]
  3. Guido Bertoni, Luca Breveglieri, Farina Roberto, Francesco Regazzoni
    Speeding Up AES By Extending a 32 bit Processor Instruction Set. [Citation Graph (0, 0)][DBLP]
    ASAP, 2006, pp:275-282 [Conf]
  4. Guido Bertoni, Luca Breveglieri, Pasqualina Fragneto, Marco Macchetti, Stefano Marchesin
    Efficient Software Implementation of AES on 32-Bit Platforms. [Citation Graph (0, 0)][DBLP]
    CHES, 2002, pp:159-171 [Conf]
  5. Guido Bertoni, Jorge Guajardo, Sandeep S. Kumar, Gerardo Orlando, Christof Paar, Thomas J. Wollinger
    Efficient GF(pm) Arithmetic Architectures for Cryptographic Applications. [Citation Graph (0, 0)][DBLP]
    CT-RSA, 2003, pp:158-175 [Conf]
  6. Guido Bertoni, Luca Breveglieri, Pasqualina Fragneto
    Efficient finite field digital-serial multiplier architecture for cryptography applications. [Citation Graph (0, 0)][DBLP]
    DATE, 2001, pp:812- [Conf]
  7. Guido Bertoni, Luca Breveglieri, Pasqualina Fragneto, Gerardo Pelosi, L. Sportiello
    Software implementation of Tate pairing over GF(2m). [Citation Graph (0, 0)][DBLP]
    DATE Designers' Forum, 2006, pp:7-11 [Conf]
  8. Guido Bertoni, Luca Breveglieri, Israel Koren, Paolo Maistri
    An Efficient Hardware-Based Fault Diagnosis Scheme for AES: Performances and Cost. [Citation Graph (0, 0)][DBLP]
    DFT, 2004, pp:130-138 [Conf]
  9. Guido Bertoni, Luca Breveglieri, Israel Koren, Paolo Maistri, Vincenzo Piuri
    A Parity Code Based Fault Detection for an Implementation of the Advanced Encryption Standard. [Citation Graph (0, 0)][DBLP]
    DFT, 2002, pp:51-59 [Conf]
  10. Guido Bertoni, Luca Breveglieri, Israel Koren, Paolo Maistri, Vincenzo Piuri
    Detecting and Locating Faults in VLSI Implementations of the Advanced Encryption Standard. [Citation Graph (0, 0)][DBLP]
    DFT, 2003, pp:105-0 [Conf]
  11. Guido Bertoni, Marco Macchetti, Luca Negri, Pasqualina Fragneto
    Power-efficient ASIC synthesis of cryptographic sboxes. [Citation Graph (0, 0)][DBLP]
    ACM Great Lakes Symposium on VLSI, 2004, pp:277-281 [Conf]
  12. Thomas J. Wollinger, Guido Bertoni, Luca Breveglieri, Christof Paar
    Performance of HECC Coprocessors Using Inversion-Free Formulae. [Citation Graph (0, 0)][DBLP]
    ICCSA (3), 2006, pp:1004-1012 [Conf]
  13. Guido Bertoni, Jorge Guajardo, Gerardo Orlando
    Systolic and Scalable Architectures for Digit-Serial Multiplication in Fields GF(pm). [Citation Graph (0, 0)][DBLP]
    INDOCRYPT, 2003, pp:349-362 [Conf]
  14. Guido Bertoni, A. Bircan, Luca Breveglieri, Pasqualina Fragneto, Marco Macchetti, Vittorio Zaccaria
    About the performances of the Advanced Encryption Standard in embedded systems with cache memory. [Citation Graph (0, 0)][DBLP]
    ISCAS (5), 2003, pp:145-148 [Conf]
  15. Guido Bertoni, Luca Breveglieri, Thomas J. Wollinger, Christof Paar
    Finding Optimum Parallel Coprocessor Design for Genus 2 Hyperelliptic Curve Cryptosystems. [Citation Graph (0, 0)][DBLP]
    ITCC (2), 2004, pp:538-0 [Conf]
  16. Guido Bertoni, Vittorio Zaccaria, Luca Breveglieri, Matteo Monchiero, Gianluca Palermo
    AES Power Attack Based on Induced Cache Miss and Countermeasure. [Citation Graph (0, 0)][DBLP]
    ITCC (1), 2005, pp:586-591 [Conf]
  17. Fabio Sozzani, Guido Bertoni, Stefano Turcato, Luca Breveglieri
    A Parallelized Design for an Elliptic Curve Cryptosystem Coprocessor. [Citation Graph (0, 0)][DBLP]
    ITCC (1), 2005, pp:626-630 [Conf]
  18. Guido Bertoni, Luca Breveglieri, Pasqualina Fragneto, Gerardo Pelosi
    Parallel Hardware Architectures for the Cryptographic Tate Pairing. [Citation Graph (0, 0)][DBLP]
    ITNG, 2006, pp:186-191 [Conf]
  19. Guido Bertoni, Luca Breveglieri, Matteo Venturi
    ECC Hardware Coprocessors for 8-bit Systems and Power Consumption Considerations. [Citation Graph (0, 0)][DBLP]
    ITNG, 2006, pp:573-574 [Conf]
  20. Guido Bertoni, Luca Breveglieri, Matteo Venturi
    Power Aware Design of an Elliptic Curve Coprocessor for 8 bit Platforms. [Citation Graph (0, 0)][DBLP]
    PerCom Workshops, 2006, pp:337-341 [Conf]
  21. Guido Bertoni, Luca Breveglieri, Israel Koren, Paolo Maistri, Vincenzo Piuri
    Error Analysis and Detection Procedures for a Hardware Implementation of the Advanced Encryption Standard. [Citation Graph (0, 0)][DBLP]
    IEEE Trans. Computers, 2003, v:52, n:4, pp:492-505 [Journal]

  22. Sponge-Based Pseudo-Random Number Generators. [Citation Graph (, )][DBLP]


  23. On the Indifferentiability of the Sponge Construction. [Citation Graph (, )][DBLP]


  24. Low Voltage Fault Attacks on the RSA Cryptosystem. [Citation Graph (, )][DBLP]


  25. A FPGA Coprocessor for the Cryptographic Tate Pairing over Fp. [Citation Graph (, )][DBLP]


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