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Francesco Regazzoni: [Publications] [Author Rank by year] [Co-authors] [Prefers] [Cites] [Cited by]

Publications of Author

  1. Guido Bertoni, Luca Breveglieri, Farina Roberto, Francesco Regazzoni
    Speeding Up AES By Extending a 32 bit Processor Instruction Set. [Citation Graph (0, 0)][DBLP]
    ASAP, 2006, pp:275-282 [Conf]
  2. Sathish Chandra, Francesco Regazzoni, Marcello Lajolo
    Hardware/software partitioning of operating systems: a behavioral synthesis approach. [Citation Graph (0, 0)][DBLP]
    ACM Great Lakes Symposium on VLSI, 2006, pp:324-329 [Conf]
  3. Matteo Giaconia, Marco Macchetti, Francesco Regazzoni, Kai Schramm
    Area and Power Efficient Synthesis of DPA-Resistant Cryptographic S-Boxes. [Citation Graph (0, 0)][DBLP]
    VLSI Design, 2007, pp:731-737 [Conf]
  4. André C. Nácul, Francesco Regazzoni, Marcello Lajolo
    Hardware scheduling support in SMP architectures. [Citation Graph (0, 0)][DBLP]
    DATE, 2007, pp:642-647 [Conf]
  5. Francesco Regazzoni, Stéphane Badel, Thomas Eisenbarth, Johann Großschädl, Axel Poschmann, Zeynep Toprak Deniz, Marco Macchetti, Laura Pozzi, Christof Paar, Yusuf Leblebici, Paolo Ienne
    A Simulation-Based Methodology for Evaluating the DPA-Resistance of Cryptographic Functional Units with Application to CMOS and MCML Technologies. [Citation Graph (0, 0)][DBLP]
    ICSAMOS, 2007, pp:209-214 [Conf]

  6. A Design Flow and Evaluation Framework for DPA-Resistant Instruction Set Extensions. [Citation Graph (, )][DBLP]


  7. A reconfigurable multiprocessor architecture for a reliable face recognition implementation. [Citation Graph (, )][DBLP]


  8. Power Attacks Resistance of Cryptographic S-Boxes with Added Error Detection Circuits. [Citation Graph (, )][DBLP]


  9. Can Knowledge Regarding the Presence of Countermeasures Against Fault Attacks Simplify Power Attacks on Cryptographic Devices?. [Citation Graph (, )][DBLP]


  10. A 640 Mbit/S 32-Bit Pipelined Implementation of the AES Algorithm. [Citation Graph (, )][DBLP]


  11. Fresh Re-keying: Security against Side-Channel and Fault Attacks for Low-Cost Devices. [Citation Graph (, )][DBLP]


  12. Automatic synthesis of the Hardware/Software Interface. [Citation Graph (, )][DBLP]


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