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Jeffrey T. Draper: [Publications] [Author Rank by year] [Co-authors] [Prefers] [Cites] [Cited by]

Publications of Author

  1. Jeffrey T. Draper, Jeff Sondeen, Sumit D. Mediratta, Ihn Kim
    Implementation of a 32-bit RISC Processor for the Data-Intensive Architecture Processing-In-Memory Chip. [Citation Graph (0, 0)][DBLP]
    ASAP, 2002, pp:163-172 [Conf]
  2. Louis Luh, John Choma Jr., Jeffrey T. Draper
    A Continuous-Time Switched-Current Sigma-Delta Modulator with Reduced Loop Delay. [Citation Graph (0, 0)][DBLP]
    Great Lakes Symposium on VLSI, 1998, pp:286-0 [Conf]
  3. Louis Luh, John Choma Jr., Jeffrey T. Draper
    Area-Efficient Area Pad Design for High Pin-Count Chips. [Citation Graph (0, 0)][DBLP]
    Great Lakes Symposium on VLSI, 1999, pp:78-81 [Conf]
  4. Sumit D. Mediratta, Jeffrey T. Draper
    Performance Analysis of User-Level PIM Communication in the Data IntensiVe Architecture (DIVA) System. [Citation Graph (0, 0)][DBLP]
    HiPC, 2005, pp:407-419 [Conf]
  5. Craig S. Steele, Jeffrey T. Draper, Jeff Koller, C. LaCour
    A Bus-Efficient Low-Latency Network Interface for the PDSS Multicomputer. [Citation Graph (0, 0)][DBLP]
    HPDC, 1997, pp:213-222 [Conf]
  6. Jeffrey T. Draper, Jacqueline Chame, Mary W. Hall, Craig S. Steele, Tim Barrett, Jeff LaCoss, John J. Granacki, Jaewook Shin, Chun Chen, Chang Woo Kang, Ihn Kim Gokhan
    The architecture of the DIVA processing-in-memory chip. [Citation Graph (0, 0)][DBLP]
    ICS, 2002, pp:14-25 [Conf]
  7. Jeffrey T. Draper, Jay Block, Jeff Koller, Craig S. Steele
    Thermal Management in Embedded Systems Using MEMS. [Citation Graph (0, 0)][DBLP]
    IPPS/SPDP Workshops, 1998, pp:900-901 [Conf]
  8. Jeffrey T. Draper, Joydeep Ghosh
    Multipath E-Cube Algorithms (MECA) for Adaptive Wormhole Routing and Broadcasting in itk-ary itn-Cubes. [Citation Graph (0, 0)][DBLP]
    IPPS, 1992, pp:407-410 [Conf]
  9. Craig S. Steele, Jeffrey T. Draper, Jeff Koller
    Safety Net: Secure Communications for Embedded High-Performance Computing. [Citation Graph (0, 0)][DBLP]
    IPPS/SPDP Workshops, 1998, pp:908-912 [Conf]
  10. Sumit D. Mediratta, Craig S. Steele, Jeff Sondeen, Jeffrey T. Draper
    An area-efficient and protected network interface for processing-in-memory systems. [Citation Graph (0, 0)][DBLP]
    ISCAS (3), 2005, pp:2951-2954 [Conf]
  11. Louis Luh, John Choma Jr., Jeffrey T. Draper
    A self-sensing tristate pad driver for control signals of multiple bus controllers. [Citation Graph (0, 0)][DBLP]
    ISCAS (1), 1999, pp:447-450 [Conf]
  12. Taek-Jun Kwon, Joong-Seok Moon, Jeff Sondeen, Jeffrey T. Draper
    A 0.18 µm implementation of a floating-point unit for a processing-in-memory system. [Citation Graph (0, 0)][DBLP]
    ISCAS (2), 2004, pp:453-456 [Conf]
  13. Jeffrey T. Draper
    The Red Rover Algorithm for Deadlock-Free Routing on Bidirectional Rings. [Citation Graph (0, 0)][DBLP]
    PDPTA, 1996, pp:345-354 [Conf]
  14. Jeffrey T. Draper, Fabrizio Petrini
    Routing in Bidirectional k-ary n-cubes with the Red Rover Algorithm. [Citation Graph (0, 0)][DBLP]
    PDPTA, 1997, pp:1184-1193 [Conf]
  15. Sumit D. Mediratta, Jeff Sondeen, Jeffrey T. Draper
    An Area-Efficient Router for the Data-Intensive Architecture (DIVA) System. [Citation Graph (0, 0)][DBLP]
    VLSI Design, 2004, pp:863-868 [Conf]
  16. Jeffrey T. Draper, Joydeep Ghosh
    A Comprehensive Analytical Model for Wormhole Routng in Multicomputer Systems. [Citation Graph (0, 0)][DBLP]
    J. Parallel Distrib. Comput., 1994, v:23, n:2, pp:202-214 [Journal]
  17. Joydeep Ghosh, Kelvin D. Goveas, Jeffrey T. Draper
    Performance Evaluation of a Parallel I/O Subsystem for Hypercube Multicomputers. [Citation Graph (0, 0)][DBLP]
    J. Parallel Distrib. Comput., 1993, v:17, n:1-2, pp:90-106 [Journal]
  18. Jeffrey T. Draper, Joydeep Ghosh
    The M-Cache: A Message-Handling Mechanism for Multicomputer Systems. [Citation Graph (0, 0)][DBLP]
    Parallel Computing, 1994, v:20, n:9, pp:1269-1288 [Journal]
  19. Sumit D. Mediratta, Jeffrey T. Draper
    Characterization of a Fault-tolerant NoC Router. [Citation Graph (0, 0)][DBLP]
    ISCAS, 2007, pp:381-384 [Conf]
  20. Tim Barrett, Sumit D. Mediratta, Taek-Jun Kwon, Ravinder Singh, Sachit Chandra, Jeff Sondeen, Jeffrey T. Draper
    A double-data rate (DDR) processing-in-memory (PIM) device with wideword floating-point capability. [Citation Graph (0, 0)][DBLP]
    ISCAS, 2006, pp:- [Conf]
  21. Joong-Seok Moon, William C. Athas, Sigfrid D. Soli, Jeffrey T. Draper, Peter A. Beerel
    Voltage-pulse driven harmonic resonant rail drivers for low-power applications. [Citation Graph (0, 0)][DBLP]
    IEEE Trans. VLSI Syst., 2003, v:11, n:5, pp:762-777 [Journal]

  22. Performance Evaluation of Probe-Send Fault-tolerant Network-on-chip Router. [Citation Graph (, )][DBLP]


  23. Multicast routing with dynamic packet fragmentation. [Citation Graph (, )][DBLP]


  24. Design trade-offs in floating-point unit implementation for embedded and processing-in-memory systems. [Citation Graph (, )][DBLP]


  25. The M-cache: a message-retrieving mechanism for multicomputer systems. [Citation Graph (, )][DBLP]


  26. Fault-Tolerant Flow Control in On-chip Networks. [Citation Graph (, )][DBLP]


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