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Publications of Author

1. Reiner W. Hartenstein, Jürgen Becker, Rainer Kress, Helmut Reinig, Karin Schmidt
   A Parallelizing Compilation Method for the Map-oriented Machine. [Citation Graph (0, 0)][DBLP]
   ASAP, 1995, pp:129-132 [Conf]
   
2. Andreas Ast, Reiner W. Hartenstein, Rainer Kress, Helmut Reinig, Karin Schmidt
   Novel High Performance Machine Paradigms and Fast- Turnaround ASIC Design Methods. [Citation Graph (0, 0)][DBLP]
   FPL, 1992, pp:211-217 [Conf]
   
3. Andreas Ast, Jürgen Becker, Reiner W. Hartenstein, Rainer Kress, Helmut Reinig, Karin Schmidt
   Data-Procedural Languages for FPL-based Machines. [Citation Graph (0, 0)][DBLP]
   FPL, 1994, pp:183-195 [Conf]
   
4. Reiner W. Hartenstein, Rainer Kress, Helmut Reinig
   A New FPGA Architecture for Word-Oriented Datapaths. [Citation Graph (0, 0)][DBLP]
   FPL, 1994, pp:144-155 [Conf]
   
5. Reiner W. Hartenstein, Jürgen Becker, Rainer Kress, Helmut Reinig
   CoDe-C: A Novel Two-Level Hardware/Software Co-Design Framework. [Citation Graph (0, 0)][DBLP]
   VLSI Design, 1996, pp:81-84 [Conf]
   
6. Reiner W. Hartenstein, Jürgen Becker, Rainer Kress, Helmut Reinig
   High-performance computing using a reconfigurable accelerator. [Citation Graph (0, 0)][DBLP]
   Concurrency - Practice and Experience, 1996, v:8, n:6, pp:429-443 [Journal]
   
7. 
   An Efficient Weighted-Round-Robin Algorithm for Multiprocessor Architectures. [Citation Graph (, )][DBLP]
   
   
8. 
   Comparison of Deadlock Recovery and Avoidance Mechanisms to Approach Message Dependent Deadlocks in On-chip Networks. [Citation Graph (, )][DBLP]