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Weijia Shang: [Publications] [Author Rank by year] [Co-authors] [Prefers] [Cites] [Cited by]

Publications of Author

  1. Edin Hodzic, Weijia Shang
    On Supernode Transformation with Minimized Total Running Time. [Citation Graph (0, 0)][DBLP]
    ASAP, 1996, pp:402-414 [Conf]
  2. Weijia Shang, Matthew T. O'Keefe, José A. B. Fortes
    Generalized cycle shrinking. [Citation Graph (0, 0)][DBLP]
    Algorithms and Parallel VLSI Architectures, 1991, pp:131-144 [Conf]
  3. Radhika S. Grover, Weijia Shang, Qiang Li
    A faster distributed arithmetic architecture for FPGAs. [Citation Graph (0, 0)][DBLP]
    FPGA, 2002, pp:31-39 [Conf]
  4. Radhika S. Grover, Weijia Shang, Qiang Li
    A Comparison of FPGA Implementations of Bit-Level and Word-Level Matrix Multipliers. [Citation Graph (0, 0)][DBLP]
    FPL, 2000, pp:422-431 [Conf]
  5. Edin Hodzic, Weijia Shang
    On Optimal Size and Shape of Supernode Transformations. [Citation Graph (0, 0)][DBLP]
    ICPP, Vol. 3, 1996, pp:25-34 [Conf]
  6. Weijia Shang, José A. B. Fortes
    Independent Partitioning of Algorithms With Uniform Data Dependencies. [Citation Graph (0, 0)][DBLP]
    ICPP (2), 1988, pp:26-33 [Conf]
  7. Weijia Shang, José A. B. Fortes
    Time-Optimal and Conflict-Free Mappings of Uniform Dependence Algorithms into Lower Dimensional Processor Arrays. [Citation Graph (0, 0)][DBLP]
    ICPP (1), 1990, pp:101-110 [Conf]
  8. Weijia Shang, Matthew T. O'Keefe, José A. B. Fortes
    On Loop Transformations for Generalized Cycle Shrinking. [Citation Graph (0, 0)][DBLP]
    ICPP (2), 1991, pp:132-141 [Conf]
  9. Weijia Shang, Benjamin W. Wah
    Dependence Analysis and Architecture Design for Bit-Level Algorithms. [Citation Graph (0, 0)][DBLP]
    ICPP, 1993, pp:30-38 [Conf]
  10. Margaret A. Schaar, Kemal Efe, Weijia Shang
    Queueing performance analysis of co-scheduling in a pool of processors environment. [Citation Graph (0, 0)][DBLP]
    International Conference on Supercomputing, 1994, pp:313-322 [Conf]
  11. Zhigang Chen, Weijia Shang
    Mapping of Uniform Dependence Algorithm onto Fixed Size Processor Arrays. [Citation Graph (0, 0)][DBLP]
    IPPS, 1993, pp:804-809 [Conf]
  12. Zhenhui Yang, Weijia Shang, José A. B. Fortes
    Conflict-Free Scheduling of Nested Loop Algorithms on Lower Dimensional Processor Arrays. [Citation Graph (0, 0)][DBLP]
    IPPS, 1992, pp:156-164 [Conf]
  13. Radhika S. Grover, Shobha Krishnan, Weijia Shang, Qiang Li
    Performance Trade-offs of DCT with Variable Length Carry Chains in FPGAs. [Citation Graph (0, 0)][DBLP]
    PDPTA, 2004, pp:442-448 [Conf]
  14. Edin Hodzic, Weijia Shang
    On Time Optimal Supernode Shape. [Citation Graph (0, 0)][DBLP]
    PDPTA, 1999, pp:2019-2026 [Conf]
  15. Srinivasan Subha, Weijia Shang
    On Data Locality in Supernode Transformation. [Citation Graph (0, 0)][DBLP]
    PDPTA, 2003, pp:1635-1641 [Conf]
  16. Zhigang Chen, Weijia Shang
    On Uniformization of Affine Dependence Algorithms. [Citation Graph (0, 0)][DBLP]
    SPDP, 1992, pp:128-137 [Conf]
  17. José A. B. Fortes, Benjamin W. Wah, Weijia Shang, Kumar N. Ganapathy
    Algorithm-Specific Parallel Processing with Linear Processor Arrays. [Citation Graph (0, 0)][DBLP]
    Advances in Computers, 1994, v:38, n:, pp:197-245 [Journal]
  18. Radhika S. Grover, Weijia Shang, Qiang Li
    Bit-level two's complement matrix multiplication. [Citation Graph (0, 0)][DBLP]
    Integration, 2002, v:33, n:1-2, pp:3-21 [Journal]
  19. Benjamin W. Wah, Mokhtar Aboelaze, Weijia Shang
    Systematic Designs of Buffers in Macropipelines of Systolic Arrays. [Citation Graph (0, 0)][DBLP]
    J. Parallel Distrib. Comput., 1988, v:5, n:1, pp:1-25 [Journal]
  20. Weijia Shang, José A. B. Fortes
    Time Optimal Linear Schedules for Algorithms with Uniform Dependencies. [Citation Graph (0, 0)][DBLP]
    IEEE Trans. Computers, 1991, v:40, n:6, pp:723-742 [Journal]
  21. Weijia Shang, José A. B. Fortes
    Independent Partitioning of Algorithms with Uniform Dependencies. [Citation Graph (0, 0)][DBLP]
    IEEE Trans. Computers, 1992, v:41, n:2, pp:190-206 [Journal]
  22. Weijia Shang, Edin Hodzic, Zhigang Chen
    On Uniformization of Affine Dependence Algorithms. [Citation Graph (0, 0)][DBLP]
    IEEE Trans. Computers, 1996, v:45, n:7, pp:827-840 [Journal]
  23. Edin Hodzic, Weijia Shang
    On Time Optimal Supernode Shape. [Citation Graph (0, 0)][DBLP]
    IEEE Trans. Parallel Distrib. Syst., 2002, v:13, n:12, pp:1220-1233 [Journal]
  24. Edin Hodzic, Weijia Shang
    On Supernode Transformation with Minimized Total Running Time. [Citation Graph (0, 0)][DBLP]
    IEEE Trans. Parallel Distrib. Syst., 1998, v:9, n:5, pp:417-428 [Journal]
  25. Weijia Shang, José A. B. Fortes
    On Time Mapping of Uniform Dependence Algorithms into Lower Dimensional Processor Arrays. [Citation Graph (0, 0)][DBLP]
    IEEE Trans. Parallel Distrib. Syst., 1992, v:3, n:3, pp:350-363 [Journal]
  26. Weijia Shang, Matthew T. O'Keefe, José A. B. Fortes
    On Loop Transformations for Generalized Cycle Shrinking. [Citation Graph (0, 0)][DBLP]
    IEEE Trans. Parallel Distrib. Syst., 1994, v:5, n:2, pp:193-204 [Journal]
  27. Stefan Schäckeler, Weijia Shang
    Stack size reduction of recursive programs. [Citation Graph (0, 0)][DBLP]
    CASES, 2007, pp:48-52 [Conf]
  28. Jun Zhang, Xiaoquan Yi, Nam Ling, Weijia Shang
    Chroma Coding Efficiency Improvement with Context Adaptive Lagrange Multiplier (CALM). [Citation Graph (0, 0)][DBLP]
    ISCAS, 2007, pp:293-296 [Conf]

  29. Procedural Abstraction with Reverse Prefix Trees. [Citation Graph (, )][DBLP]


  30. Optimal dissemination of layered videos in P2P-Based IPTV networks. [Citation Graph (, )][DBLP]


  31. Coefficient Conversion for Transform Domain VC-1 TO H.264 Transcoding. [Citation Graph (, )][DBLP]


  32. Optimizing the stack size of recursive functions. [Citation Graph (, )][DBLP]


  33. On minimizing register usage of linearly scheduled algorithms with uniform dependencies. [Citation Graph (, )][DBLP]


  34. Visualization of Procedural Abstraction. [Citation Graph (, )][DBLP]


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