The SCEAS System
Navigation Menu

Search the dblp DataBase

Title:
Author:

Spiridon Nikolaidis: [Publications] [Author Rank by year] [Co-authors] [Prefers] [Cites] [Cited by]

Publications of Author

  1. Nikolaos Kavvadias, Spiridon Nikolaidis
    Automated Instruction-Set Extension of Embedded Processors with Application to MPEG-4 Video Encoding. [Citation Graph (0, 0)][DBLP]
    ASAP, 2005, pp:140-145 [Conf]
  2. Dimitrios Soudris, Spiridon Nikolaidis, S. Siskos, Konstantinos Tatas, K. Siozios, G. Koutroumpezis, Nikolaos Vassiliadis, V. Kalenteridis, H. Pournara, I. Pappas, Adonios Thanailakis
    AMDREL: a novel low-energy FPGA architecture and supporting CAD tool design flow. [Citation Graph (0, 0)][DBLP]
    ASP-DAC, 2005, pp:3-4 [Conf]
  3. Labros Bisdounis, Odysseas G. Koufopavlou, Constantinos E. Goutis, Spiridon Nikolaidis
    Switching Response Modeling of the CMOS Inverter for Sub-micron Devices. [Citation Graph (0, 0)][DBLP]
    DATE, 1998, pp:729-0 [Conf]
  4. Alexander Chatzigeorgiou, Spiridon Nikolaidis
    Collapsing the Transistor Chain to an Effective Single Equivalent Transistor. [Citation Graph (0, 0)][DBLP]
    DATE, 1998, pp:2-6 [Conf]
  5. Nikolaos Kavvadias, Spiridon Nikolaidis
    Hardware Support for Arbitrarily Complex Loop Structures in Embedded Applications. [Citation Graph (0, 0)][DBLP]
    DATE, 2005, pp:1060-1061 [Conf]
  6. Efstathios D. Kyriakis-Bitzaros, Spiridon Nikolaidis, Anna Tatsaki
    Accurate calculation of bit-level transition activity using word-level statistics and entropy function. [Citation Graph (0, 0)][DBLP]
    ICCAD, 1998, pp:607-610 [Conf]
  7. Nikolaos Kavvadias, Alexander Chatzigeorgiou, Nikolaos D. Zervas, Spiridon Nikolaidis
    Memory hierarchy exploration for low power architectures in embedded multimedia applications. [Citation Graph (0, 0)][DBLP]
    ICIP (3), 2001, pp:326-329 [Conf]
  8. V. Kalenteridis, H. Pournara, K. Siozios, Konstantinos Tatas, G. Koutroumpezis, I. Pappas, Spiridon Nikolaidis, S. Siskos, D. J. Soudris, Adonios Thanailakis
    An Integrated FPGA Design Framework: Custom Designed FPGA Platform and Application Mapping Toolset Development. [Citation Graph (0, 0)][DBLP]
    IPDPS, 2004, pp:- [Conf]
  9. Nikolaos Vassiliadis, George Theodoridis, Spiridon Nikolaidis
    An automated development framework for a RISC processor with reconfigurable instruction set extensions. [Citation Graph (0, 0)][DBLP]
    IPDPS, 2006, pp:- [Conf]
  10. Spiridon Nikolaidis, D. E. Metafas, Constantinos E. Goutis
    CORDIC Based Pipeline Architecture for All-pass Filters. [Citation Graph (0, 0)][DBLP]
    ISCAS, 1993, pp:1917-1920 [Conf]
  11. Alexander Chatzigeorgiou, Spiridon Nikolaidis, Ioannis Tsoukalas, Odysseas G. Koufopavlou
    CMOS gate modeling based on equivalent inverter. [Citation Graph (0, 0)][DBLP]
    ISCAS (6), 1999, pp:234-237 [Conf]
  12. Athanasios Kakarountas, K. Papadomanolakis, Spiridon Nikolaidis, Dimitrios Soudris, Constantinos E. Goutis
    Confronting violations of the TSCG(T) in low-power design. [Citation Graph (0, 0)][DBLP]
    ISCAS (4), 2002, pp:313-316 [Conf]
  13. Labros Bisdounis, Odysseas G. Koufopavlou, Spiridon Nikolaidis
    Accurate evaluation of CMOS short-circuit power dissipation for short-channel devices. [Citation Graph (0, 0)][DBLP]
    ISLPED, 1996, pp:189-192 [Conf]
  14. Labros Bisdounis, Spyros Blionas, Enrico Macii, Spiridon Nikolaidis, Roberto Zafalon
    Energy-Aware System-on-Chip for 5 GHz Wireless LANs. [Citation Graph (0, 0)][DBLP]
    PATMOS, 2005, pp:166-176 [Conf]
  15. Patricia Guitton-Ouhamou, Hanene Ben Fradj, Cécile Belleudy, Spiridon Nikolaidis
    Low Power Co-design Tool and Power Optimization of Schedules and Memory System. [Citation Graph (0, 0)][DBLP]
    PATMOS, 2004, pp:603-612 [Conf]
  16. Athanasios Kakarountas, Vassilis Spiliotopoulos, Spiridon Nikolaidis, Constantinos E. Goutis
    The Impact of Low-Power Techniques on the Design of Portable Safety-Critical Systems. [Citation Graph (0, 0)][DBLP]
    PATMOS, 2004, pp:501-509 [Conf]
  17. Nikolaos Kavvadias, Spiridon Nikolaidis
    Application Analysis with Integrated Identification of Complex Instructions for Configurable Processors. [Citation Graph (0, 0)][DBLP]
    PATMOS, 2004, pp:633-642 [Conf]
  18. Spiridon Nikolaidis, Nikolaos Kavvadias, T. Laopoulos, Labros Bisdounis, Spyros Blionas
    Instruction Level Energy Modeling for Pipelined Processors. [Citation Graph (0, 0)][DBLP]
    PATMOS, 2003, pp:279-288 [Conf]
  19. Spiridon Nikolaidis, Nikolaos Kavvadias, P. Neofotistos, K. Kosmatopoulos, T. Laopoulos, Labros Bisdounis
    Instrumentation Set-up for Instruction Level Power Modeling. [Citation Graph (0, 0)][DBLP]
    PATMOS, 2002, pp:71-80 [Conf]
  20. Spiridon Nikolaidis, H. Pournara, Alexander Chatzigeorgiou
    Output Waveform Evaluation of Basic Pass Transistor Structure. [Citation Graph (0, 0)][DBLP]
    PATMOS, 2002, pp:229-238 [Conf]
  21. Kostas Masselos, Spyros Blionas, Jean-Yves Mignolet, A. Foster, Dimitrios Soudris, Spiridon Nikolaidis
    Hardware Building Blocks of a Mixed Granularity Reconfigurable System-on-Chip Platform. [Citation Graph (0, 0)][DBLP]
    PATMOS, 2004, pp:613-622 [Conf]
  22. Konstantinos Tatas, K. Siozios, Nikolaos Vassiliadis, D. J. Soudris, Spiridon Nikolaidis, S. Siskos, Adonios Thanailakis
    FPGA Architecture Design and Toolset for Logic Implementation. [Citation Graph (0, 0)][DBLP]
    PATMOS, 2003, pp:607-616 [Conf]
  23. Nikolaos Vassiliadis, A. Chormoviti, Nikolaos Kavvadias, Spiridon Nikolaidis
    The Effect of Data-Reuse Transformations on Multimedia Applications for Different Processing Platforms. [Citation Graph (0, 0)][DBLP]
    PATMOS, 2004, pp:593-602 [Conf]
  24. Nikolaos Kavvadias, Spiridon Nikolaidis
    Tradeoffs in the Design Space Exploration of Application-Specific Processors. [Citation Graph (0, 0)][DBLP]
    VLSI-SOC, 2003, pp:233-238 [Conf]
  25. Stamatiki Kougia, Alexander Chatzigeorgiou, Spiridon Nikolaidis
    Evaluating Power Efficient Data-Reuse Decisions For Embedded Multimedia Applications: An Analytical Approach. [Citation Graph (0, 0)][DBLP]
    Journal of Circuits, Systems, and Computers, 2004, v:13, n:1, pp:151-180 [Journal]
  26. Spiridon Nikolaidis, Efstathios D. Kyriakis-Bitzaros
    A Charge Recycling Technique for the Design of Low Power CMOS Clock Drivers. [Citation Graph (0, 0)][DBLP]
    Journal of Circuits, Systems, and Computers, 1999, v:9, n:3-4, pp:169-180 [Journal]
  27. Spiridon Nikolaidis, E. Karaolis, Athanasios Kakarountas, K. Papadomanolakis, Constantinos E. Goutis
    A Methodology for Calculating the Undetectable Double-Faults in Self-Checking Circuits. [Citation Graph (0, 0)][DBLP]
    Journal of Circuits, Systems, and Computers, 2003, v:12, n:1, pp:75-92 [Journal]
  28. Alexander Chatzigeorgiou, Spiridon Nikolaidis, Ioannis Tsoukalas
    A modeling technique for CMOS gates. [Citation Graph (0, 0)][DBLP]
    IEEE Trans. on CAD of Integrated Circuits and Systems, 1999, v:18, n:5, pp:557-575 [Journal]
  29. Spiridon Nikolaidis, E. Karaolis, Efstathios D. Kyriakis-Bitzaros
    Estimation of signal transition activity in FIR filters implementedby a MAC architecture. [Citation Graph (0, 0)][DBLP]
    IEEE Trans. on CAD of Integrated Circuits and Systems, 2000, v:19, n:1, pp:164-169 [Journal]
  30. V. Kalenteridis, H. Pournara, K. Siozios, Konstantinos Tatas, Nikolaos Vassiliadis, I. Pappas, G. Koutroumpezis, Spiridon Nikolaidis, S. Siskos, D. J. Soudris
    A complete platform and toolset for system implementation on fine-grain reconfigurable hardware. [Citation Graph (0, 0)][DBLP]
    Microprocessors and Microsystems, 2005, v:29, n:6, pp:247-259 [Journal]
  31. Nikolaos Kavvadias, Spiridon Nikolaidis
    A portable specification of zero-overhead looping control hardware applied to embedded processors. [Citation Graph (0, 0)][DBLP]
    ISCAS, 2006, pp:- [Conf]
  32. Nikolaos Vassiliadis, George Theodoridis, Spiridon Nikolaidis
    The ARISE Reconfigurable Instruction Set Extensions Framework. [Citation Graph (0, 0)][DBLP]
    ICSAMOS, 2007, pp:153-160 [Conf]
  33. Nikolaos Vassiliadis, George Theodoridis, Spiridon Nikolaidis
    Enhancing a Reconfigurable Instruction Set Processor with Partial Predication and Virtual Opcode Support. [Citation Graph (0, 0)][DBLP]
    ARC, 2006, pp:217-229 [Conf]
  34. Nikolaos Kavvadias, Spiridon Nikolaidis
    Hardware Support for Arbitrarily Complex Loop Structures in Embedded Applications [Citation Graph (0, 0)][DBLP]
    CoRR, 2007, v:0, n:, pp:- [Journal]
  35. Nikolaos Kavvadias, Vasiliki Giannakopoulou, Spiridon Nikolaidis
    Development of a customized processor architecture for accelerating genetic algorithms. [Citation Graph (0, 0)][DBLP]
    Microprocessors and Microsystems, 2007, v:31, n:5, pp:347-359 [Journal]
  36. Labros Bisdounis, Spyros Blionas, Enrico Macii, Spiridon Nikolaidis, Roberto Zafalon
    Implementation Strategy and Results of an Energy-Aware System-on-Chip for 5 GHz WLAN Applications. [Citation Graph (0, 0)][DBLP]
    J. Low Power Electronics, 2006, v:2, n:1, pp:18-26 [Journal]

  37. ARISE Machines: Extending Processors with Hybrid Accelerators. [Citation Graph (, )][DBLP]


Search in 0.005secs, Finished in 0.006secs
NOTICE1
System may not be available sometimes or not working properly, since it is still in development with continuous upgrades
NOTICE2
The rankings that are presented on this page should NOT be considered as formal since the citation info is incomplete in DBLP
 
System created by asidirop@csd.auth.gr [http://users.auth.gr/~asidirop/] © 2002
for Data Engineering Laboratory, Department of Informatics, Aristotle University © 2002