Search the dblp DataBase
Kees A. Vissers :
[Publications ]
[Author Rank by year ]
[Co-authors ]
[Prefers ]
[Cites ]
[Cited by ]
Publications of Author
Bart Kienhuis , Ed F. Deprettere , Kees A. Vissers , Pieter van der Wolf An Approach for Quantitative Analysis of Application-Specific Dataflow Architectures. [Citation Graph (0, 0)][DBLP ] ASAP, 1997, pp:338-349 [Conf ] Kees A. Vissers Programming models and architectures for FPGA platforms. [Citation Graph (0, 0)][DBLP ] CASES, 2004, pp:1- [Conf ] Reinaldo A. Bergamaschi , Grant Martin , Wayne Wolf , Rolf Ernst , Kees A. Vissers , Jack Kouloheris The future of system-level design: can we find the right solutions to the right problems at the right time? [Citation Graph (0, 0)][DBLP ] CODES+ISSS, 2003, pp:231- [Conf ] Bart Kienhuis , Ed F. Deprettere , Kees A. Vissers , Pieter van der Wolf The construction of a retargetable simulator for an architecture template. [Citation Graph (0, 0)][DBLP ] CODES, 1998, pp:125-129 [Conf ] Kees A. Vissers Trade-offs in the design of mixed hardware-software systems-a perspective from industry. [Citation Graph (0, 0)][DBLP ] CODES, 1997, pp:65-68 [Conf ] Pieter van der Wolf , Paul Lieverse , Mudit Goel , David La Hei , Kees A. Vissers An MPEG-2 decoder case study as a driver for a system level design methodology. [Citation Graph (0, 0)][DBLP ] CODES, 1999, pp:33-37 [Conf ] Erwin A. de Kock , W. J. M. Smits , Pieter van der Wolf , Jean-Yves Brunel , W. M. Kruijtzer , Paul Lieverse , Kees A. Vissers , Gerben Essink YAPI: application modeling for signal processing systems. [Citation Graph (0, 0)][DBLP ] DAC, 2000, pp:402-405 [Conf ] Rolf Ernst , Grant Martin , Oz Levia , Pierre G. Paulin , Stamatis Vassiliadis , Kees A. Vissers The Future of Flexible HW Platform Architectures Panel Discussion. [Citation Graph (0, 0)][DBLP ] DATE, 2000, pp:634-0 [Conf ] Zhi Guo , Betul Buyukkurt , Walid A. Najjar , Kees A. Vissers Optimized Generation of Data-Path from C Codes for FPGAs. [Citation Graph (0, 0)][DBLP ] DATE, 2005, pp:112-117 [Conf ] Wolfgang Rosenstiel , Rudy Lauwereins , Ivo Bolsens , Chris Rowen , Yankin Tanurhan , Kees A. Vissers , S. Wang Panel Title: Reconfigurable Computing - Different Perspectives. [Citation Graph (0, 0)][DBLP ] DATE, 2003, pp:10476-10477 [Conf ] Kees A. Vissers Parallel Processing Architectures for Reconfigurable Systems. [Citation Graph (0, 0)][DBLP ] DATE, 2003, pp:10396-10397 [Conf ] Mihai Sima , Sorin Cotofana , Stamatis Vassiliadis , Jos T. J. van Eijndhoven , Kees A. Vissers MPEG-Compliant Entropy Decoding on FPGA-Augmented TriMedia/CPU64. [Citation Graph (0, 0)][DBLP ] FCCM, 2002, pp:261-0 [Conf ] Zhi Guo , Walid A. Najjar , Frank Vahid , Kees A. Vissers A quantitative analysis of the speedup factors of FPGAs over processors. [Citation Graph (0, 0)][DBLP ] FPGA, 2004, pp:162-170 [Conf ] Roman L. Lysecky , Kris Miller , Frank Vahid , Kees A. Vissers Firm-core Virtual FPGA for Just-in-Time FPGA Compilation (abstract only). [Citation Graph (0, 0)][DBLP ] FPGA, 2005, pp:271- [Conf ] Kristof Denolf , Adrian Chirila-Rus , Robert D. Turney , Paul R. Schumacher , Kees A. Vissers Memory Efficient Design of an MPEG-4 Video Encoder for FPGAs. [Citation Graph (0, 0)][DBLP ] FPL, 2005, pp:391-396 [Conf ] Mihai Sima , Stamatis Vassiliadis , Sorin Cotofana , Jos T. J. van Eijndhoven , Kees A. Vissers Field-Programmable Custom Computing Machines - A Taxonomy -. [Citation Graph (0, 0)][DBLP ] FPL, 2002, pp:79-88 [Conf ] Rolf Ernst , Kees A. Vissers , Pieter van der Wolf , Gert-Jan van Rootselaar System level design and debug of high-performance embedded media systems (tutorial). [Citation Graph (0, 0)][DBLP ] ICCAD, 1999, pp:461- [Conf ] Gerben Essink , Emile H. L. Aarts , R. van Dongen , P. van Gerwen , Jan H. M. Korst , Kees A. Vissers Scheduling in Programmable Video Signal Processors. [Citation Graph (0, 0)][DBLP ] ICCAD, 1991, pp:284-287 [Conf ] Jos T. J. van Eijndhoven , Kees A. Vissers , Evert-Jan D. Pol , P. Struik , R. H. J. Bloks , Pieter van der Wolf , Harald P. E. Vranken , Frans Sijstermans , M. J. A. Tromp , Andy D. Pimentel TriMedia CPU64 Architecture. [Citation Graph (0, 0)][DBLP ] ICCD, 1999, pp:586-592 [Conf ] A. K. Riemens , Kees A. Vissers , R. J. Schutten , Gerben J. Hekstra , G. D. La Hei , Frans Sijstermans TriMedia CPU64 Application Domain and Benchmark Suite. [Citation Graph (0, 0)][DBLP ] ICCD, 1999, pp:580-585 [Conf ] Mihai Sima , Sorin Cotofana , Stamatis Vassiliadis , Jos T. J. van Eijndhoven , Kees A. Vissers MPEG Macroblock Parsing and Pel Reconstruction On An FPGA-Augmented TriMedia Processor. [Citation Graph (0, 0)][DBLP ] ICCD, 2001, pp:425-430 [Conf ] Paul R. Schumacher , Kristof Denolf , Adrian Chirila-Rus , Robert D. Turney , Nick Fedele , Kees A. Vissers , Jan Bormans A scalable, multi-stream MPEG-4 video decoder for conferencing and surveillance applications. [Citation Graph (0, 0)][DBLP ] ICIP (2), 2005, pp:886-889 [Conf ] Gerben Essink , Emile H. L. Aarts , R. van Dongen , P. van Gerwen , Jan H. M. Korst , Kees A. Vissers Architecture and Programming of a VLIW Style Programmable Video Signal Processor. [Citation Graph (0, 0)][DBLP ] MICRO, 1991, pp:181-188 [Conf ] Adrian Chirila-Rus , Kristof Denolf , Bart Vanhoof , Paul R. Schumacher , Kees A. Vissers Communication Primitives Driven Hardware Design and Test Methodology Applied on Complex Video Applications. [Citation Graph (0, 0)][DBLP ] IEEE International Workshop on Rapid System Prototyping, 2005, pp:246-249 [Conf ] Bart Kienhuis , Ed F. Deprettere , Pieter van der Wolf , Kees A. Vissers A Methodology to Design Programmable Embedded Systems - The Y-Chart Approach. [Citation Graph (0, 0)][DBLP ] Embedded Processor Design Challenges, 2002, pp:18-37 [Conf ] Mihai Sima , Sorin Cotofana , Stamatis Vassiliadis , Jos T. J. van Eijndhoven , Kees A. Vissers A Reconfigurable Functional Unit for TriMedia/CPU64. A Case Study. [Citation Graph (0, 0)][DBLP ] Embedded Processor Design Challenges, 2002, pp:224-241 [Conf ] Kees A. Vissers Programming Extremely Flexible Platforms. [Citation Graph (0, 0)][DBLP ] SAMOS, 2004, pp:191- [Conf ] Andrew Mihal , Chidamber Kulkarni , Matthew W. Moskewicz , Mel M. Tsai , Niraj Shah , Scott J. Weber , Yujia Jin , Kurt Keutzer , Christian Sauer , Kees A. Vissers , Sharad Malik Developing Architectural Platforms: A Disciplined Approach. [Citation Graph (0, 0)][DBLP ] IEEE Design & Test of Computers, 2002, v:19, n:6, pp:6-16 [Journal ] Mihai Sima , Sorin Dan Cotofana , Stamatis Vassiliadis , Jos T. J. van Eijndhoven , Kees A. Vissers Pel reconstruction on FPGA-augmented TriMedia. [Citation Graph (0, 0)][DBLP ] IEEE Trans. VLSI Syst., 2004, v:12, n:6, pp:622-635 [Journal ] Zhi Guo , Betul Buyukkurt , Walid A. Najjar , Kees A. Vissers Optimized Generation of Data-Path from C Codes for FPGAs [Citation Graph (0, 0)][DBLP ] CoRR, 2007, v:0, n:, pp:- [Journal ] The wild west: conquest of complex hardware-dependent software design. [Citation Graph (, )][DBLP ] Programming high performance signal processing systems in high level languages. [Citation Graph (, )][DBLP ] Using C-to-gates to program streaming image processing kernels efficiently on FPGAs. [Citation Graph (, )][DBLP ] Streaming Systems in FPGAs. [Citation Graph (, )][DBLP ] Search in 0.002secs, Finished in 0.452secs